Patents by Inventor Moazzem M. Hossain

Moazzem M. Hossain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for making integrated circuits by inserting buffers into a netlist
    Patent number: 5974245
    Abstract: The present invention discloses a method and an apparatus for making digital integrated circuits by considering ramp delay and clock skew as constraints while minimizing the number of inserted buffers and overall wire length connecting components for large clock trees. The invention includes developing a set of circuit specifications including maximum clock skew, minimum driveability, and maximum ramp delay. These specifications are described in a hardware description language on a digital computer system, and a netlist is synthesized from this hardware description. A modified netlist is then formed by analyzing the netlist and inserting buffers into it to satisfy the circuit specifications of skew, driveability, and ramp delay. Thereafter, a digital integrated circuit is produced as specified by the modified netlist.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: October 26, 1999
    Assignee: VSLI Technology, Inc.
    Inventors: Ying-Meng Li, Sunil V. Ashtaputre, Jacob Greidinger, Mark R. Hartoog, Moazzem M. Hossain, Siu-Tong Hui
  • Method and apparatus for making integrated circuits by inserting buffers into a netlist to control clock skew
    Patent number: 5638291
    Abstract: The present invention discloses a method and an apparatus for making digital integrated circuits by considering ramp delay and clock skew as constraints while minimizing the number of inserted buffers and overall wire length connecting components for large clock trees. The invention includes developing a set of circuit specifications including maximum clock skew, minimum driveability, and maximum ramp delay. These specifications are described in a hardware description language on a digital computer system, and a netlist is synthesized from this hardware description. A modified netlist is then formed by analyzing the netlist and inserting buffers into it to satisfy the circuit specifications of skew, driveabilility, and ramp delay. Thereafter, a digital integrated circuit is produced as specified by the modified netlist.
    Type: Grant
    Filed: October 14, 1994
    Date of Patent: June 10, 1997
    Assignee: VLSI Technology, Inc.
    Inventors: Ying-Meng Li, Sunil V. Ashtaputre, Jacob Greidinger, Mark R. Hartoog, Moazzem M. Hossain, Siu-Tong Hui