Abstract: A solid-state imaging element according to the present disclosure includes one or more photoelectric conversion layers, a penetrating electrode, and a connection pad. The one or more photoelectric conversion layers are provided on one principal surface side serving as a light incidence plane of a semiconductor substrate. The penetrating electrode is provided in a pixel area, connected at one end to the photoelectric conversion layer to penetrate through front and back surfaces of the semiconductor substrate, and transfers an electric charge photoelectrically converted by the photoelectric conversion layer, to a different principal surface side of the semiconductor substrate. The connection pad is provided on a same layer as gates (Ga, Gr, G1, and g2) of transistors (AMP, RST, TG1, and TG2) provided on the different principal surface side of the semiconductor substrate, and to which a different end of the penetrating electrode is connected.

Abstract: A solid-state image sensor is provided that includes a semiconductor substrate, a charge accumulator disposed in the semiconductor substrate and configured to accumulate charge, a photoelectric converter provided above the semiconductor substrate and configured to convert light to charge, and a through electrode passing through the semiconductor substrate and electrically connecting the charge accumulator with the photoelectric converter. At an end portion on the photoelectric converter side of the through electrode, a cross-sectional area of a conductor positioned at the center of the through electrode in a cut section orthogonal to a through direction of the through electrode gradually increases toward the photoelectric converter along the through direction.

Abstract: An imaging element according to an embodiment of the present disclosure includes: a semiconductor substrate; a first photoelectric converter; a through electrode; a first dielectric film; and a second dielectric film. The semiconductor substrate has one surface and another surface that are opposed to each other. The semiconductor substrate has a through hole penetrating between the one surface and the other surface. The first photoelectric converter is provided above the one surface of the semiconductor substrate. The through electrode is electrically coupled to the first photoelectric converter. The through electrode penetrates the semiconductor substrate inside the through hole. The first dielectric film is provided on the one surface of the semiconductor substrate. The first dielectric film has first film thickness. The second dielectric film is provided on a side surface of the through hole. The second dielectric film has second film thickness.

Abstract: A semiconductor light emitting element has a laminated structure formed by laminating a first compound semiconductor layer, an active layer, and a second compound semiconductor layer. The semiconductor light emitting element satisfies ?I2>?I1, where ?I1 is an operating current range when the temperature of the active layer is T1, and ?I2 is the operating current range when the temperature of the active layer is T2 (where T2>T1). The semiconductor light emitting element satisfies P2>P1, where P1 is a maximum optical output emitted when the temperature of the active layer is T1, and P2 is the maximum optical output emitted when the temperature of the active layer is T2 (where T2>T1).

Abstract: A semiconductor light emitting element has a laminated structure formed by laminating a first compound semiconductor layer, an active layer, and a second compound semiconductor layer. The semiconductor light emitting element satisfies ?I2>?I1, where ?I1 is an operating current range when the temperature of the active layer is T1, and ?I2 is the operating current range when the temperature of the active layer is T2 (where T2>T1). The semiconductor light emitting element satisfies P2>P1, where P1 is a maximum optical output emitted when the temperature of the active layer is T1, and P2 is the maximum optical output emitted when the temperature of the active layer is T2 (where T2>T1).