Patents by Inventor Moeha Shibuya
Moeha Shibuya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240170040Abstract: An apparatus that includes first, second, third and fourth circuit regions arranged in a first direction in numerical order. The first circuit region includes a first global power supply line extending in a second direction vertical to the first direction and a first local power supply line, the first local power supply line being branched from the first global power supply line and extending in the first direction across the second, third and fourth regions. The third circuit region includes a first power switch coupled between the first local power supply line and an internal power supply line extending in the first direction across the first, second, third and fourth regions. Each of the second and fourth regions includes a circuit coupled to the first local power supply line and an additional circuit coupled to the internal power supply line.Type: ApplicationFiled: September 5, 2023Publication date: May 23, 2024Applicant: MICRON TECHNOLOGY, INC.Inventors: YUKI MIURA, MOEHA SHIBUYA, SAAYA IZUMI
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Patent number: 11705188Abstract: Disclosed herein is an apparatus that includes: first and second wiring patterns extending in a first direction, first and second transistors arranged adjacent to each other, and third to sixth wiring patterns extending in a second direction. The third wiring pattern is connected between the first wiring pattern and one of source/drain regions of the first transistor, the fourth wiring pattern is connected between the second wiring pattern and other of source/drain regions of the first transistor, the fifth wiring pattern is connected to one of source/drain regions of the second transistor, the fifth wiring pattern overlapping with the first wiring pattern, the sixth wiring pattern is connected to other of source/drain regions of the second transistor, the sixth wiring pattern overlapping with the second wiring pattern. The third and fourth wiring patterns are greater in width in the first direction than the fifth and sixth wiring patterns.Type: GrantFiled: November 17, 2021Date of Patent: July 18, 2023Assignee: Micron Technology, Inc.Inventors: Toshiaki Tsukihashi, Kenichi Watanabe, Kazuyuki Morishige, Moeha Shibuya, Kumiko Ishii
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Patent number: 11527281Abstract: Apparatuses with a signal line in a semiconductor device are described. An example apparatus includes one or more power supply voltage lines in a first conductive layer, a plurality of transistors and a signal line in a second conductive layer. Each transistor of the plurality of transistors includes an active region disposed in a substrate and a gate electrode above the active region. The signal line in the second conductive layer is below the first conductive layer and above the active regions of the plurality of transistors. The signal line is coupled to the gate electrodes of the plurality of transistors. The signal line has electrical resistance higher than electrical resistance of the power supply voltage line.Type: GrantFiled: March 30, 2021Date of Patent: December 13, 2022Assignee: Micron Technology, Inc.Inventors: Kenichi Watanabe, Moeha Shibuya
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Publication number: 20220319580Abstract: Apparatuses with a signal line in a semiconductor device are described. An example apparatus includes one or more power supply voltage lines in a first conductive layer, a plurality of transistors and a signal line in a second conductive layer. Each transistor of the plurality of transistors includes an active region disposed in a substrate and a gate electrode above the active region. The signal line in the second conductive layer is below the first conductive layer and above the active regions of the plurality of transistors. The signal line is coupled to the gate electrodes of the plurality of transistors. The signal line has electrical resistance higher than electrical resistance of the power supply voltage line.Type: ApplicationFiled: March 30, 2021Publication date: October 6, 2022Applicant: Micron Technology, Inc.Inventors: Kenichi Watanabe, Moeha Shibuya
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Publication number: 20220076736Abstract: Disclosed herein is an apparatus that includes: first and second wiring patterns extending in a first direction, first and second transistors arranged adjacent to each other, and third to sixth wiring patterns extending in a second direction. The third wiring pattern is connected between the first wiring pattern and one of source/drain regions of the first transistor, the fourth wiring pattern is connected between the second wiring pattern and other of source/drain regions of the first transistor, the fifth wiring pattern is connected to one of source/drain regions of the second transistor, the fifth wiring pattern overlapping with the first wiring pattern, the sixth wiring pattern is connected to other of source/drain regions of the second transistor, the sixth wiring pattern overlapping with the second wiring pattern. The third and fourth wiring patterns are greater in width in the first direction than the fifth and sixth wiring patterns.Type: ApplicationFiled: November 17, 2021Publication date: March 10, 2022Applicant: MICRON TECHNOLOGY, INC.Inventors: Toshiaki Tsukihashi, Kenichi Watanabe, Kazuyuki Morishige, Moeha Shibuya, Kumiko Ishii
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Patent number: 11183232Abstract: Disclosed herein is an apparatus that includes: first and second wiring patterns extending in a first direction, first and second transistors arranged adjacent to each other, and third to sixth wiring patterns extending in a second direction. The third wiring pattern is connected between the first wiring pattern and one of source/drain regions of the first transistor, the fourth wiring pattern is connected between the second wiring pattern and other of source/drain regions of the first transistor, the fifth wiring pattern is connected to one of source/drain regions of the second transistor, the fifth wiring pattern overlapping with the first wiring pattern, the sixth wiring pattern is connected to other of source/drain regions of the second transistor, the sixth wiring pattern overlapping with the second wiring pattern. The third and fourth wiring patterns are greater in width in the first direction than the fifth and sixth wiring patterns.Type: GrantFiled: February 25, 2020Date of Patent: November 23, 2021Assignee: Micron Technology, Inc.Inventors: Toshiaki Tsukihashi, Kenichi Watanabe, Kazuyuki Morishige, Moeha Shibuya, Kumiko Ishii
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Publication number: 20210264967Abstract: Disclosed herein is an apparatus that includes: first and second wiring patterns extending in a first direction, first and second transistors arranged adjacent to each other, and third to sixth wiring patterns extending in a second direction. The third wiring pattern is connected between the first wiring pattern and one of source/drain regions of the first transistor, the fourth wiring pattern is connected between the second wiring pattern and other of source/drain regions of the first transistor, the fifth wiring pattern is connected to one of source/drain regions of the second transistor, the fifth wiring pattern overlapping with the first wiring pattern, the sixth wiring pattern is connected to other of source/drain regions of the second transistor, the sixth wiring pattern overlapping with the second wiring pattern. The third and fourth wiring patterns are greater in width in the first direction than the fifth and sixth wiring patterns.Type: ApplicationFiled: February 25, 2020Publication date: August 26, 2021Applicant: MICRON TECHNOLOGY, INC.Inventors: Toshiaki Tsukihashi, Kenichi Watanabe, Kazuyuki Morishige, Moeha Shibuya, Kumiko Ishii