Patents by Inventor Mohak Chhabra

Mohak Chhabra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10211790
    Abstract: A circuit including: input and output nodes and first and second feedback nodes; a first input amplifier having an input connected to the input node and an output connected to the first feedback node; a second input amplifier having an input connected to the input node and an output connected to the second feedback node; a capacitor connecting the first feedback node and the second feedback node; an amplifier having an input connected to the first feedback node and an output connected to the output node; a base feedback amplifier with an input connected to the output node and an output connected to the first feedback node; a tunable feedback amplifier with an input connected to the output node and an output connected to the second feedback node; and a tuning circuit for varying a transconductance of the tunable feedback circuit and operational frequency of the peaking amplifier circuit.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: February 19, 2019
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Michael Chen, Steven M. Clements, Mohak Chhabra, Steven E. Mikes, Hayden C. Cranford, Jr.
  • Publication number: 20180278218
    Abstract: A circuit including: input and output nodes and first and second feedback nodes; a first input amplifier having an input connected to the input node and an output connected to the first feedback node; a second input amplifier having an input connected to the input node and an output connected to the second feedback node; a capacitor connecting the first feedback node and the second feedback node; an amplifier having an input connected to the first feedback node and an output connected to the output node; a base feedback amplifier with an input connected to the output node and an output connected to the first feedback node; a tunable feedback amplifier with an input connected to the output node and an output connected to the second feedback node; and a tuning circuit for varying a transconductance of the tunable feedback circuit and operational frequency of the peaking amplifier circuit.
    Type: Application
    Filed: October 23, 2017
    Publication date: September 27, 2018
    Inventors: Michael Chen, Steven M. Clements, Mohak Chhabra, Steven E. Mikes, Hayden C. Cranford, JR.
  • Patent number: 10033334
    Abstract: The disclosure is directed to a tunable peaking amplifier circuit including: an input node, an output node and a feedback node; a first input amplifier having an input connected to the input node and an output connected to the feedback node; a second input amplifier having an input connected to the input node; a coupling capacitor connected between an output of the second input amplifier and the feedback node; an amplifier having an input connected to the feedback node and an output connected to the output node; and a feedback circuit having an input coupled to the output node and an output connected to the feedback node, the feedback circuit including a tuning circuit for varying a transconductance of the feedback circuit to adjust an operational frequency of the peaking amplifier circuit.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: July 24, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Michael Chen, Steven M. Clements, Mohak Chhabra, Steven E. Mikes, Hayden C. Cranford, Jr.
  • Patent number: 9960738
    Abstract: A tunable peaking amplifier circuit including: an input node, an output node, and a feedback node; a first input amplifier having an input connected to the input node and an output connected to the feedback node; a second input amplifier having an input connected to the input node; a coupling capacitor connected between an output of the second input amplifier and the feedback node; an amplifier having an input connected to the feedback node and an output connected to the output node; a feedback circuit including: a base feedback amplifier having an input connected to the output node and an output connected to the feedback node; and a tunable feedback amplifier having an input connected to the output node and an output connected to the feedback node; and a tuning circuit for varying a transconductance of the feedback circuit to adjust an operational frequency of the peaking amplifier circuit.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: May 1, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Michael Chen, Steven M. Clements, Mohak Chhabra, Steven E. Mikes, Hayden C. Cranford, Jr.
  • Patent number: 9853612
    Abstract: A circuit including: input and output nodes and first and second feedback nodes; a first input amplifier having an input connected to the input node and an output connected to the first feedback node; a second input amplifier having an input connected to the input node and an output connected to the second feedback node; a capacitor connecting the first feedback node and the second feedback node; an amplifier having an input connected to the first feedback node and an output connected to the output node; a base feedback amplifier with an input connected to the output node and an output connected to the first feedback node; a tunable feedback amplifier with an input connected to the output node and an output connected to the second feedback node; and a tuning circuit for varying a transconductance of the tunable feedback circuit and operational frequency of the peaking amplifier circuit.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: December 26, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Michael Chen, Steven M. Clements, Mohak Chhabra, Steven E. Mikes, Hayden C. Cranford, Jr.
  • Publication number: 20120153909
    Abstract: Voltage regulator circuits and methods implementing hybrid fast-slow passgate control circuitry are provided to minimize the ripple amplitude of a regulated voltage output. In one aspect, a voltage regulator circuit includes a comparator, a first passgate device, a second passgate device, and a bandwidth limiting control circuit. The comparator compares a reference voltage to a regulated voltage at an output node of the voltage regulator circuit and generates a first control signal on a first gate control path based on a result of the comparing. The first and second passgate devices are connected to the output node of the regulator circuit. The first passgate device is controlled in a bang-bang mode of operation by the first control signal to supply current to the output node. The bandwidth limiting control circuit has an input connected to the first gate control path and an output connected to the second passgate device.
    Type: Application
    Filed: August 19, 2011
    Publication date: June 21, 2012
    Applicant: International Business Machines Corporation
    Inventors: William L. Bucossi, John F. Bulzacchelli, Mohak Chhabra, Zeynep Toprak-Deniz, Daniel J. Friedman, Joseph A. Iadanza, Todd M. Rasmus