Abstract: A chip includes a pool of blocks. Each block is adapted to implement a communication protocol. A cross-connect configurably connects between the blocks. A configured connection through the cross-connect between a sending block and a receiving block includes a lane with a toggle line and multiple data lines. The receiving block uses the toggle line to determine when valid data is on the data lines. The sending block and receiving block are on different clock domains.

Abstract: A Higher order (HO) Optical channel Data Unit (ODU)k signal is extracted from an HO Optical channel Transport Unit (OTU)k signal using a first clock at or faster than the OTUk clock. An HO Optical channel Payload Unit OPUk signal is extracted from the HO ODUk signal using the first clock. An Optical channel Data Tributary Unit (ODTU) signal is demultiplexed from the HO OPUk signal using the first clock. The ODTU signal is demapped to a lower order (LO) ODUj signal. The LO ODUj data is then smoothed using a smoothing function. Only one clock is used for the multiple stages of extraction of a LO ODUj from a HO OTUk signal.

Abstract: At a generator, frame events are received indicative of frame boundaries. The amount of client data received between frame events is counted to get a raw count. The raw count is low-pass filtered to get a smoothed value. At a receiver, an indication of the smoothed count is received from the generator; and the indication is smoothed using a low-pass filter and used to produce a client data rate.