Patents by Inventor Mohamad Shaved

Mohamad Shaved has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for handling assertion libraries in functional verification
    Patent number: 7712060
    Abstract: A method and system for handling assertion libraries in verification of a design are disclosed. The method and system include structuring and implementing at least one verification component in at least one of the assertion libraries with at least one standard assertion language supported by at least one verification tool, creating an assertion library element for a specific requirement for verification of the design without dependence on the at least one verification tool for the assertion library element, and resolving assertion status. With the disclosed method and system, visualization of assertion status at various levels of design hierarchy and at verification component level may be achieved, and implementing verification techniques may include optimization techniques during and/or after verification.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: May 4, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Tarun Garg, Vinaya Kumar Singh, Pratik Mahajan, Mohamad Shaved