Abstract: Disclosed herein are example embodiments of methods, apparatus, and systems for transactors configured for use in a hardware emulation environment and designed to adapt to speed changes dynamically at runtime in addition to providing dynamic port mapping. Among the embodiments disclosed herein is an emulation system comprising one or more configurable hardware components (e.g., configurable logic blocks) configured to implement a mutable port group transactor in communication with a design under test being emulated by the emulation system. The emulation system can further comprise a host computer in communication with the emulator and configured to provide configuration commands to the emulator that alter the mutable port group transactor from a first configuration to a second configuration.

Abstract: A system may include a hardware-based emulation platform configured to emulate operation of a design-under-test (“DUT”), a database system, and a verification system. The verification system may include a storage system which may include a memory layer and a local storage layer, where the memory layer has a lower memory access latency than the local storage layer. The verification system may also include a design verification engine configured to send test data to the hardware-based emulation platform; buffer response data received from the DUT into the memory layer and the local storage layer; determine to aggregate the response data stored in both the memory layer and local storage layer into a write transaction according to buffering criteria, and issue the write transaction to the database system to store the aggregated response data in the database system.

Abstract: Disclosed herein are example embodiments of methods, apparatus, and systems for transactors configured for use in a hardware emulation environment and designed to adapt to speed changes dynamically at runtime in addition to providing dynamic port mapping. Among the embodiments disclosed herein is an emulation system comprising one or more configurable hardware components (e.g., configurable logic blocks) configured to implement a mutable port group transactor in communication with a design under test being emulated by the emulation system. The emulation system can further comprise a host computer in communication with the emulator and configured to provide configuration commands to the emulator that alter the mutable port group transactor from a first configuration to a second configuration.