Patents by Inventor Mohammad Amanullah

Mohammad Amanullah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9960244
    Abstract: A field effect transistor includes a substrate, an epitaxial layer, a remnant-oxide layer, an electrode, a surrounding-oxide layer, a surrounding-nitride layer, a gate oxide layer, a gate, a P-body region, a source region, an interlayer dielectric and a source electrode. The epitaxial layer on the substrate has a trench having a sidewall and a bottom. The electrode inside the trench is coated subsequently by the surrounding-oxide layer, the surrounding-nitride layer and the remnant-oxide layer. The gate formed on the gate oxide layer is separated from the electrode sequentially by the gate oxide layer, the surrounding-nitride layer and the surrounding-oxide layer. The P-body region and the source region, formed at the epitaxial layer, are separated from the gate by the gate oxide layer. The interlayer dielectric covers the source region and the gate. The source electrode covers the P-body region and the interlayer dielectric, and contacts the source region.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: May 1, 2018
    Assignee: Taiwan Semiconductor Co., Ltd.
    Inventors: Yi-Lung Tsai, Aryadeep Mrinal, Mohammad Amanullah, Po-Wen Yang, Shu-Siang Liang
  • Publication number: 20180090580
    Abstract: A field effect transistor includes a substrate, an epitaxial layer, a remnant-oxide layer, an electrode, a surrounding-oxide layer, a surrounding-nitride layer, a gate oxide layer, a gate, a P-body region, a source region, an interlayer dielectric and a source electrode. The epitaxial layer on the substrate has a trench having a sidewall and a bottom. The electrode inside the trench is coated subsequently by the surrounding-oxide layer, the surrounding-nitride layer and the remnant-oxide layer. The gate formed on the gate oxide layer is separated from the electrode sequentially by the gate oxide layer, the surrounding-nitride layer and the surrounding-oxide layer. The P-body region and the source region, formed at the epitaxial layer, are separated from the gate by the gate oxide layer. The interlayer dielectric covers the source region and the gate. The source electrode covers the P-body region and the interlayer dielectric, and contacts the source region.
    Type: Application
    Filed: August 25, 2017
    Publication date: March 29, 2018
    Inventors: Yi-Lung TSAI, Aryadeep MRINAL, Mohammad AMANULLAH, Po-Wen YANG, Shu-Siang LIANG
  • Patent number: 9905690
    Abstract: A field effect transistor is manufactured by firstly forming an epitaxial layer on a substrate. Then, a trench having an oxide layer is formed on the epitaxial layer. The oxide layer has a first electrode portion having a first width and a first height and a second electrode portion having a second width and a second height. A gate oxide layer covering the oxide layer and the second electrode portion has a gate portion having a third width. The epitaxial layer has a body region and a source region, where these two regions are adjacent to the gate portion and covered by an interlayer dielectric. A source electrode covering the body region and the interlayer dielectric contacts the source region. The first height is no less than the second height, the first width is smaller than the second width, and the second width is smaller than the third width.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: February 27, 2018
    Assignee: TAIWAN SEMICONDUCTOR CO., LTD.
    Inventors: Yi-Lung Tsai, Aryadeep Mrinal, Mohammad Amanullah, Po-Wen Yang, Shu-Siang Liang
  • Publication number: 20180053849
    Abstract: A field effect transistor is manufactured by firstly forming an epitaxial layer on a substrate. Then, a trench having an oxide layer is formed on the epitaxial layer. The oxide layer has a first electrode portion having a first width and a first height and a second electrode portion having a second width and a second height. A gate oxide layer covering the oxide layer and the second electrode portion has a gate portion having a third width. The epitaxial layer has a body region and a source region, where these two regions are adjacent to the gate portion and covered by an interlayer dielectric. A source electrode covering the body region and the interlayer dielectric contacts the source region. The first height is no less than the second height, the first width is smaller than the second width, and the second width is smaller than the third width.
    Type: Application
    Filed: September 20, 2016
    Publication date: February 22, 2018
    Inventors: Yi-Lung TSAI, Aryadeep MRINAL, Mohammad AMANULLAH, Po-Wen YANG, Shu-Siang LIANG
  • Patent number: 9799742
    Abstract: A field effect transistor includes a substrate, an epitaxial layer, a remnant-oxide layer, an electrode, a surrounding-oxide layer, a surrounding-nitride layer, a gate oxide layer, a gate, a P-body region, a source region, an interlayer dielectric and a source electrode. The epitaxial layer on the substrate has a trench having a sidewall and a bottom. The electrode inside the trench is coated subsequently by the surrounding-oxide layer, the surrounding-nitride layer and the remnant-oxide layer. The gate formed on the gate oxide layer is separated from the electrode sequentially by the gate oxide layer, the surrounding-nitride layer and the surrounding-oxide layer. The P-body region and the source region, formed at the epitaxial layer, are separated from the gate by the gate oxide layer. The interlayer dielectric covers the source region and the gate. The source electrode covers the P-body region and the interlayer dielectric, and contacts the source region.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: October 24, 2017
    Assignee: Taiwan Semiconductor Co., Ltd.
    Inventors: Yi-Lung Tsai, Aryadeep Mrinal, Mohammad Amanullah, Po-Wen Yang, Shu-Siang Liang
  • Patent number: 9741825
    Abstract: A method for manufacturing a field effect transistor having a widened trench forms sequentially an epitaxial layer, a trench, an oxidation layer, a trench-oxidation layer, a polysilicon layer, a residual oxidation layer, an electrode portion, a lower trench, a widened trench, a gate portion, a body region, a source region, an interlayer dielectric layer and a source electrode. The trench is formed at the epitaxial layer. The oxidation layer, the trench-oxidation layer and a polysilicon layer are then formed. The residual oxidation layer and the electrode portion are formed in the trench by etching the polysilicon layer and the trench-oxidation layer. The lower trench is formed by etching the epitaxial layer. The widened trench is formed by widening a portion of the trench away from a trench bottom so as to have the electrode portion and the residual oxidation layer disposed at the lower trench.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: August 22, 2017
    Assignee: TAIWAN SEMICONDUCTOR CO., LTD.
    Inventors: Yi-Lung Tsai, Aryadeep Mrinal, Mohammad Amanullah, Po-Wen Yang, Shu-Siang Liang