Patents by Inventor Mohammad H. S. Amin

Mohammad H. S. Amin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190324941
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
    Type: Application
    Filed: May 23, 2019
    Publication date: October 24, 2019
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H.S. Amin, Geordie Rose, David Grant, Miles F.H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Publication number: 20190228331
    Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.
    Type: Application
    Filed: January 25, 2019
    Publication date: July 25, 2019
    Inventors: Richard G. Harris, Paul I. Bunyk, Mohammad H.S. Amin, Emile M. Hoskinson
  • Patent number: 10346349
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: July 9, 2019
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H. S. Amin, Geordie Rose, David Grant, Miles F. H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Publication number: 20190087385
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
    Type: Application
    Filed: October 29, 2018
    Publication date: March 21, 2019
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H.S. Amin, Geordie Rose, David Grant, Miles F. H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Publication number: 20180373996
    Abstract: Systems and methods for employing macroscopic resonant tunneling operations in quantum processors are described. New modes of use for quantum processor architectures employ probe qubits to determine energy eigenvalues of a problem Hamiltonian through macroscopic resonant tunneling operations. A dedicated probe qubit design that may be added to quantum processor architectures is also described. The dedicated probe qubit enables improved performance of macroscopic resonant tunneling operations and, consequently, improved performance of the new modes of use described.
    Type: Application
    Filed: August 7, 2018
    Publication date: December 27, 2018
    Inventors: Mohammad H.S. Amin, Andrew J. Berkley, Richard G. Harris, Trevor Michael Lanting, Anatoly Yu Smirnov
  • Patent number: 10140248
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices. A method of determining a result of a computational problem using an analog processor includes receiving at a first digital computer, including a digital processor, an instance of the computational problem defined over an input graph, wherein the input graph is non-planar; and determining a mapping of the instance of the computational problem onto the analog processor, by the digital processor.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: November 27, 2018
    Assignee: D-WAVE SYSTEMS INC.
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H. S. Amin, Geordie Rose, David Grant, Miles F. H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Publication number: 20180314968
    Abstract: Devices, methods and articles advantageously allow communications between qubits to provide an architecture for universal adiabatic quantum computation. The architecture includes a first coupled basis A1B1 and a second coupled basis A2B2 that does not commute with the first basis A1B1.
    Type: Application
    Filed: April 25, 2018
    Publication date: November 1, 2018
    Inventors: Jacob Daniel Biamonte, Andrew J. Berkley, Mohammad H.S. Amin
  • Publication number: 20180308007
    Abstract: A hybrid computer generates samples for machine learning. The hybrid computer includes a processor that implements a Boltzmann machine, e.g., a quantum Boltzmann machine, which returns equilibrium samples from eigenstates of a quantum Hamiltonian. Subsets of samples are provided to training and validations modules. Operation can include: receiving a training set; preparing a model described by an Ising Hamiltonian; initializing model parameters; segmenting the training set into subsets; creating a sample set by repeatedly drawing samples until the determined number of samples has been drawn; and updating the model. Operation can include partitioning the training set into input and output data sets, and determining a conditional probability distribution that describes a probability of observing an output vector given a selected input vector, e.g.
    Type: Application
    Filed: October 14, 2016
    Publication date: October 25, 2018
    Inventors: Mohammad H.S. Amin, Evgeny Andriyash, Jason Rolfe
  • Patent number: 10068180
    Abstract: Systems and methods for employing macroscopic resonant tunneling operations in quantum processors are described. New modes of use for quantum processor architectures employ probe qubits to determine energy eigenvalues of a problem Hamiltonian through macroscopic resonant tunneling operations. A dedicated probe qubit design that may be added to quantum processor architectures is also described. The dedicated probe qubit enables improved performance of macroscopic resonant tunneling operations and, consequently, improved performance of the new modes of use described.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: September 4, 2018
    Assignee: D-Wave Systems Inc.
    Inventors: Mohammad H. S. Amin, Andrew J. Berkley, Richard G. Harris, Trevor Michael Lanting, Anatoly Yu Smirnov
  • Patent number: 10037493
    Abstract: A quantum processor is operable as a universal adiabatic quantum computing system. The quantum processor includes physical qubits, with at least a first and second communicative coupling available between pairs of qubits via an in-situ tunable superconducting capacitive coupler and an in-situ tunable superconducting inductive coupler, respectively. Tunable couplers provide diagonal and off-diagonal coupling. Compound Josephson junctions (CJJs) of the tunable couplers are responsive to a flux bias to tune a sign and magnitude of a sum of a capacitance of a fixed capacitor and a tunable capacitance which is mediated across a pair of coupling capacitors. The qubits may be hybrid qubits, operable in a flux regime or a charge regime. Qubits may include a pair of CJJs that interrupt a loop of material and which are separated by an island of superconducting material which is voltage biased with respect to a qubit body.
    Type: Grant
    Filed: October 21, 2014
    Date of Patent: July 31, 2018
    Assignee: D-Wave Systems Inc.
    Inventors: Richard G. Harris, Mohammad H. S. Amin, Anatoly Smirnov
  • Patent number: 9984333
    Abstract: Devices, methods and articles advantageously allow communications between qubits to provide an architecture for universal adiabatic quantum computation. The architecture includes a first coupled basis A1B1 and a second coupled basis A2B2 that does not commute with the first basis A1B1.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: May 29, 2018
    Assignee: D-Wave Systems Inc.
    Inventors: Jacob Daniel Biamonte, Andrew J. Berkley, Mohammad H.S. Amin
  • Publication number: 20170300827
    Abstract: Achieving orthogonal control of non-orthogonal qubit parameters of a logical qubit allows for increasing the length of a qubit chain thereby increasing the effective connectivity of the qubit chain. A hybrid qubit is formed by communicatively coupling a dedicated second qubit to a first qubit. By tuning a programmable parameter of the second qubit of a hybrid qubit, an effective programmable parameter of the hybrid qubit is adjusted without affecting another effective programmable parameter of the hybrid qubit thereby achieving orthogonal control of otherwise non-orthogonal qubit parameters. The length of the logical qubit may thus be increased by communicatively coupling a plurality of such hybrid qubits together.
    Type: Application
    Filed: July 3, 2017
    Publication date: October 19, 2017
    Inventors: Mohammad H.S. Amin, Trevor Michael Lanting, Colin Enderud
  • Publication number: 20170300454
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
    Type: Application
    Filed: June 28, 2017
    Publication date: October 19, 2017
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H.S. Amin, Geordie Rose, David Grant, Miles F.H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Publication number: 20170286859
    Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.
    Type: Application
    Filed: June 21, 2017
    Publication date: October 5, 2017
    Inventors: Richard G. Harris, Paul I. Bunyk, Mohammad H.S. Amin, Emile M. Hoskinson
  • Patent number: 9727823
    Abstract: Achieving orthogonal control of non-orthogonal qubit parameters of a logical qubit allows for increasing the length of a qubit chain thereby increasing the effective connectivity of the qubit chain. A hybrid qubit is formed by communicatively coupling a dedicated second qubit to a first qubit. By tuning a programmable parameter of the second qubit of a hybrid qubit, an effective programmable parameter of the hybrid qubit is adjusted without affecting another effective programmable parameter of the hybrid qubit thereby achieving orthogonal control of otherwise non-orthogonal qubit parameters. The length of the logical qubit may thus be increased by communicatively coupling a plurality of such hybrid qubits together.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: August 8, 2017
    Assignee: D-Wave Systems Inc.
    Inventors: Mohammad H. S. Amin, Trevor Michael Lanting, Colin Enderud
  • Patent number: 9727527
    Abstract: Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: August 8, 2017
    Assignee: D-Wave Systems Inc.
    Inventors: Alexander Maassen van den Brink, Peter Love, Mohammad H. S. Amin, Geordie Rose, David Grant, Miles F. H. Steininger, Paul I. Bunyk, Andrew J. Berkley
  • Patent number: 9710758
    Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: July 18, 2017
    Assignee: D-Wave Systems Inc.
    Inventors: Paul I. Bunyk, Mohammad H. S. Amin, Richard G. Harris, Trevor Michael Lanting, Mark W. Johnson, Jeremy P. Hilton, Emile M. Hoskinson
  • Publication number: 20160335558
    Abstract: In a quantum processor some couplers couple a given qubit to a nearest neighbor qubit (e.g., vertically and horizontally in an ordered 2D array), other couplers couple to next-nearest neighbor qubits (e.g., diagonally in the ordered 2D array). Couplers may include half-couplers, to selectively provide communicative coupling between a given qubit and other qubits, which may or may not be nearest or even next-nearest-neighbors. Tunable couplers selective mediate communicative coupling. A control system may impose a connectivity on a quantum processor, different than an “as designed” or “as manufactured” physical connectivity. Imposition may be via a digital processor processing a working or updated working graph, to map or embed a problem graph. A set of exclude qubits may be created from a comparison of hardware and working graphs. An annealing schedule may adjust a respective normalized inductance of one or more qubits, for instance to exclude certain qubits.
    Type: Application
    Filed: April 20, 2015
    Publication date: November 17, 2016
    Inventors: Paul I. Bunyk, Mohammad H.S. Amin, Richard G. Harris, Trevor Michael Lanting, Mark W. Johnson, Jeremy P. Hilton, Emile M. Hoskinson
  • Publication number: 20160132785
    Abstract: Systems and methods for employing macroscopic resonant tunneling operations in quantum processors are described. New modes of use for quantum processor architectures employ probe qubits to determine energy eigenvalues of a problem Hamiltonian through macroscopic resonant tunneling operations. A dedicated probe qubit design that may be added to quantum processor architectures is also described. The dedicated probe qubit enables improved performance of macroscopic resonant tunneling operations and, consequently, improved performance of the new modes of use described.
    Type: Application
    Filed: October 22, 2013
    Publication date: May 12, 2016
    Applicant: D-Wave Systems Inc.
    Inventors: Mohammad H.S. Amin, Andrew J. Berkley, Richard G. Harris, Trevor Michael Lanting, Anatoly Yu Smirnov
  • Publication number: 20160012346
    Abstract: Devices, methods and articles advantageously allow communications between qubits to provide an architecture for universal adiabatic quantum computation. The architecture includes a first coupled basis A1B1 and a second coupled basis A2B2 that does not commute with the first basis A1B1.
    Type: Application
    Filed: September 21, 2015
    Publication date: January 14, 2016
    Inventors: Jacob Daniel Biamonte, Andrew J. Berkley, Mohammad H.S. Amin