Abstract: The present invention provides digital imaging architectures comprising detectors coupled to readout circuitry, wherein the readout circuitry is capable of providing large amplification to small, noise sensitive input signals to improve their noise immunity, as well as capable of providing a fast pixel readout time. The readout circuitry comprises an on-pixel amplification transistor as well as additional transistors used to read out the amplified signal and/or to reset the amplified output signal stored by a portion of the circuit prior to reading a subsequent signal. The present invention also provides readout circuitry that is capable of providing large amplification and thus additional noise immunity to the input signal from the detector by implementing another amplification stage within the readout circuitry.

Abstract: The present invention provides digital imaging architectures comprising detectors coupled to readout circuitry, wherein the readout circuitry is capable of providing large amplification to small, noise sensitive input signals to improve their noise immunity, as well as capable of providing a fast pixel readout time. The readout circuitry comprises an on-pixel amplification transistor as well as additional transistors used to read out the amplified signal and/or to reset the amplified output signal stored by a portion of the circuit prior to reading a subsequent signal. The present invention also provides readout circuitry that is capable of providing large amplification and thus additional noise immunity to the input signal from the detector by implementing another amplification stage within the readout circuitry.