Patents by Inventor Mohammad Kamruzzaman CHOWDHURY
Mohammad Kamruzzaman CHOWDHURY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240044002Abstract: A substrate handling system includes a fixed deposition ring having a plurality of circumferentially spaced notches along an outer edge of the fixed deposition ring, the fixed deposition ring being electrically non-conductive; a moving deposition ring having a plurality of circumferentially spaced recesses formed on a lower surface of the moving deposition ring, the recesses configured to radially align with the notches of the fixed deposition ring, the moving deposition ring having an inner edge and an outer edge, the moving deposition ring being electrically non-conductive; and a plurality of electrically conductive grounding plates each having a base, an intermediate member, and a contact extending from the intermediate member and being spaced from the base, the intermediate members configured to be received in the recesses and extend between the inner edge and the outer edge of the moving deposition ring.Type: ApplicationFiled: August 4, 2022Publication date: February 8, 2024Inventors: Abhishek CHOWDHURY, Nataraj BHASKAR RAO, Edwin C. SUAREZ, Harisha SATHYANARAYANA, Diego Ramiro PUENTE SOTOMAYOR, Qanit TAKMEEL, Mohammad Kamruzzaman CHOWDHURY, Arun Chakravarthy CHAKRAVARTHY
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Publication number: 20230345846Abstract: A superconducting device includes a substrate, a metal oxide or metal oxynitride seed layer on the substrate, and a metal nitride superconductive layer disposed directly on the seed layer. The seed layer is an oxide or oxynitride of a first metal, and the superconductive layer is a nitride of a different second metal.Type: ApplicationFiled: March 1, 2023Publication date: October 26, 2023Inventors: Zihao Yang, Mingwei Zhu, Shriram Mangipudi, Mohammad Kamruzzaman Chowdhury, Shane Lavan, Zhebo Chen, Yong Cao, Nag B. Patibandla
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Publication number: 20230329125Abstract: A method of fabricating a device including a superconductive layer includes depositing a seed layer on a substrate, exposing the seed layer to an oxygen-containing gas or plasma to form a modified seed layer, and after exposing the seed layer to the oxygen-containing gas or plasma depositing a metal nitride superconductive layer directly on the modified seed layer. The seed layer is a nitride of a first metal, and the superconductive layer is a nitride of a different second metal.Type: ApplicationFiled: May 22, 2023Publication date: October 12, 2023Inventors: Zihao Yang, Mingwei Zhu, Shriram Mangipudi, Mohammad Kamruzzaman Chowdhury, Shane Lavan, Zhebo Chen, Yong Cao, Nag B. Patibandla
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Patent number: 11678589Abstract: A method of fabricating a device including a superconductive layer includes depositing a seed layer on a substrate, exposing the seed layer to an oxygen-containing gas or plasma to form a modified seed layer, and after exposing the seed layer to the oxygen-containing gas or plasma depositing a metal nitride superconductive layer directly on the modified seed layer. The seed layer is a nitride of a first metal, and the superconductive layer is a nitride of a different second metal.Type: GrantFiled: February 17, 2021Date of Patent: June 13, 2023Assignee: Applied Materials, Inc.Inventors: Zihao Yang, Mingwei Zhu, Shriram Mangipudi, Mohammad Kamruzzaman Chowdhury, Shane Lavan, Zhebo Chen, Yong Cao, Nag B. Patibandla
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Patent number: 11600761Abstract: A superconducting device includes a substrate, a metal oxide or metal oxynitride seed layer on the substrate, and a metal nitride superconductive layer disposed directly on the seed layer. The seed layer is an oxide or oxynitride of a first metal, and the superconductive layer is a nitride of a different second metal.Type: GrantFiled: February 17, 2021Date of Patent: March 7, 2023Assignee: Applied Materials, Inc.Inventors: Zihao Yang, Mingwei Zhu, Shriram Mangipudi, Mohammad Kamruzzaman Chowdhury, Shane Lavan, Zhebo Chen, Yong Cao, Nag B. Patibandla
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Publication number: 20220052248Abstract: A superconducting device includes a substrate, a metal oxide or metal oxynitride seed layer on the substrate, and a metal nitride superconductive layer disposed directly on the seed layer. The seed layer is an oxide or oxynitride of a first metal, and the superconductive layer is a nitride of a different second metal.Type: ApplicationFiled: February 17, 2021Publication date: February 17, 2022Inventors: Zihao Yang, Mingwei Zhu, Shriram Mangipudi, Mohammad Kamruzzaman Chowdhury, Shane Lavan, Zhebo Chen, Yong Cao, Nag B. Patibandla
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Publication number: 20220013707Abstract: A method of fabricating a device including a superconductive layer includes depositing a seed layer on a substrate, exposing the seed layer to an oxygen-containing gas or plasma to form a modified seed layer, and after exposing the seed layer to the oxygen-containing gas or plasma depositing a metal nitride superconductive layer directly on the modified seed layer. The seed layer is a nitride of a first metal, and the superconductive layer is a nitride of a different second metal.Type: ApplicationFiled: February 17, 2021Publication date: January 13, 2022Inventors: Zihao Yang, Mingwei Zhu, Shriram Mangipudi, Mohammad Kamruzzaman Chowdhury, Shane Lavan, Zhebo Chen, Yong Cao, Nag B. Patibandla
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Publication number: 20220013708Abstract: A method of fabricating a device including a superconductive layer includes depositing a seed layer on a substrate at a first temperature, the seed layer being a nitride of a first metal, reducing the temperature of the substrate to a second temperature that is lower than the first temperature, increasing the temperature of the substrate to a third temperature that is higher than the first temperature to form a modified seed layer, and depositing a metal nitride superconductive layer directly on the modified seed layer at the third temperature, the superconductive layer being a nitride of a different second metal.Type: ApplicationFiled: February 17, 2021Publication date: January 13, 2022Inventors: Zihao Yang, Mingwei Zhu, Shriram Mangipudi, Mohammad Kamruzzaman Chowdhury, Shane Lavan, Zhebo Chen, Yong Cao, Nag B. Patibandla
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Patent number: 10400327Abstract: A method of processing a substrate includes: sputtering target material for a first amount of time using a first plasma formed from an inert gas and a first amount of power; determining a first counter, based on a product of a flow rate of the inert gas, the first amount of power, and the first amount of time; sputtering a metal compound material for a second amount of time using a second plasma formed from a process gas comprising a reactive gas and an inert gas and a second amount of power; determining a second counter based on a product of a flow rate of the process gas, the second amount of power, and the second amount of time; determining a third counter; and depositing a metal compound layer onto a predetermined number of substrates, wherein a deposition time for each substrate is adjusted based on the third counter.Type: GrantFiled: January 26, 2016Date of Patent: September 3, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Mohammad Kamruzzaman Chowdhury, Zhenbin Ge, Adolph Miller Allen
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Patent number: 9721839Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer including a plurality of integrated circuits includes forming a water soluble mask above the semiconductor wafer, the water soluble mask covering and protecting the integrated circuits. The method also includes baking the water soluble mask to increase the etch resistance of the water soluble mask. The method also includes, subsequent to baking the water soluble mask, patterning the water soluble mask with a laser scribing process to provide a water soluble patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also includes plasma etching the semiconductor wafer through the gaps in the water soluble patterned mask to singulate the integrated circuits.Type: GrantFiled: June 12, 2015Date of Patent: August 1, 2017Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Mohammad Kamruzzaman Chowdhury, Brad Eaton, Ajay Kumar
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Patent number: 9620379Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a multi-layered mask comprising a laser energy absorbing, non-photodefinable topcoat disposed over a water-soluble base layer disposed over the semiconductor substrate. Because the laser light absorbing material layer is non-photodefinable, material costs associated with conventional photo resist formulations may be avoided. The mask is direct-write patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. Absorption of the mask layer within the laser emission band (e.g., UV band and/or green band) promotes good scribe line quality. The substrate may then be plasma etched through the gaps in the patterned mask to singulate the IC with the mask protecting the ICs during the plasma etch. The soluble base layer of the mask may then be dissolved subsequent to singulation, facilitating removal of the layer.Type: GrantFiled: March 11, 2014Date of Patent: April 11, 2017Assignee: Applied Materials, Inc.Inventors: Wei-Sheng Lei, Mohammad Kamruzzaman Chowdhury, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Publication number: 20160365283Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer including a plurality of integrated circuits includes forming a water soluble mask above the semiconductor wafer, the water soluble mask covering and protecting the integrated circuits. The method also includes baking the water soluble mask to increase the etch resistance of the water soluble mask. The method also includes, subsequent to baking the water soluble mask, patterning the water soluble mask with a laser scribing process to provide a water soluble patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also includes plasma etching the semiconductor wafer through the gaps in the water soluble patterned mask to singulate the integrated circuits.Type: ApplicationFiled: June 12, 2015Publication date: December 15, 2016Inventors: Wei-Sheng Lei, Mohammad Kamruzzaman Chowdhury, Brad Eaton, Ajay Kumar
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Publication number: 20160222503Abstract: A method of processing a substrate includes: sputtering target material for a first amount of time using a first plasma formed from an inert gas and a first amount of power; determining a first counter, based on a product of a flow rate of the inert gas, the first amount of power, and the first amount of time; sputtering a metal compound material for a second amount of time using a second plasma formed from a process gas comprising a reactive gas and an inert gas and a second amount of power; determining a second counter based on a product of a flow rate of the process gas, the second amount of power, and the second amount of time; determining a third counter; and depositing a metal compound layer onto a predetermined number of substrates, wherein a deposition time for each substrate is adjusted based on the third counter.Type: ApplicationFiled: January 26, 2016Publication date: August 4, 2016Inventors: Mohammad Kamruzzaman Chowdhury, Zhenbin Ge, Adolph Miller Allen
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Publication number: 20160035577Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a multi-layered mask comprising a laser energy absorbing, non-photodefinable topcoat disposed over a water-soluble base layer disposed over the semiconductor substrate. Because the laser light absorbing material layer is non-photodefinable, material costs associated with conventional photo resist formulations may be avoided. The mask is direct-write patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. Absorption of the mask layer within the laser emission band (e.g., UV band and/or green band) promotes good scribe line quality. The substrate may then be plasma etched through the gaps in the patterned mask to singulate the IC with the mask protecting the ICs during the plasma etch. The soluble base layer of the mask may then be dissolved subsequent to singulation, facilitating removal of the layer.Type: ApplicationFiled: March 11, 2014Publication date: February 4, 2016Inventors: Wei-Sheng LEI, Mohammad Kamruzzaman CHOWDHURY, Todd EGAN, Brad EATON, Madhava Rao YALAMANCHILI, Ajay KUMAR
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Patent number: 9252057Abstract: Methods and systems of laser and plasma etch wafer dicing using UV-curable adhesive films. A method includes forming a mask covering ICs formed on the wafer. The semiconductor wafer is coupled to a film frame by a UV-curable adhesive film. A pre-cure of the UV-curable adhesive film cures a peripheral portion of the adhesive extending beyond an edge of the wafer to improve the exposed adhesive material's resistance to plasma etch and reduce hydrocarbon redeposition within the etch chamber. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask to singulate the ICs. A center portion of the UV-curable adhesive is then cured and the singulated ICs detached from the film.Type: GrantFiled: October 11, 2013Date of Patent: February 2, 2016Assignee: Applied Materials, Inc.Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Patent number: 9048309Abstract: Uniform masking for wafer dicing using laser and plasma etch is described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits having bumps or pillars includes uniformly spinning on a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.Type: GrantFiled: June 13, 2013Date of Patent: June 2, 2015Assignee: Applied Materials, Inc.Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Publication number: 20150122419Abstract: Laser and plasma etch wafer dicing using UV-curable adhesive films. A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a carrier substrate by a double-sided UV-curable adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the ICs. The UV-curable adhesive film is partially cured by UV irradiation through the carrier. The singulated ICs are then detached from the partially cured adhesive film still attached to the carrier substrate, for example individually by a pick and place machine. The UV-curable adhesive film may then be further cured for the film's complete removal from the carrier substrate.Type: ApplicationFiled: January 12, 2015Publication date: May 7, 2015Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Patent number: 8969177Abstract: Laser and plasma etch wafer dicing using UV-curable adhesive films. A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a carrier substrate by a double-sided UV-curable adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the ICs. The UV-curable adhesive film is partially cured by UV irradiation through the carrier. The singulated ICs are then detached from the partially cured adhesive film still attached to the carrier substrate, for example individually by a pick and place machine. The UV-curable adhesive film may then be further cured for the film's complete removal from the carrier substrate.Type: GrantFiled: June 13, 2013Date of Patent: March 3, 2015Assignee: Applied Materials, Inc.Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Publication number: 20140106542Abstract: Methods and systems of laser and plasma etch wafer dicing using UV-curable adhesive films. A method includes forming a mask covering ICs formed on the wafer. The semiconductor wafer is coupled to a film frame by a UV-curable adhesive film. A pre-cure of the UV-curable adhesive film cures a peripheral portion of the adhesive extending beyond an edge of the wafer to improve the exposed adhesive material's resistance to plasma etch and reduce hydrocarbon redeposition within the etch chamber. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask to singulate the ICs. A center portion of the UV-curable adhesive is then cured and the singulated ICs detached from the film.Type: ApplicationFiled: October 11, 2013Publication date: April 17, 2014Inventors: Mohammad Kamruzzaman CHOWDHURY, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
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Publication number: 20140017879Abstract: Uniform masking for wafer dicing using laser and plasma etch is described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits having bumps or pillars includes uniformly spinning on a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.Type: ApplicationFiled: June 13, 2013Publication date: January 16, 2014Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar