Patents by Inventor Mohammad Rakib Uddin

Mohammad Rakib Uddin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9929239
    Abstract: The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: March 27, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-soo Lee, Myoung-jae Lee, Seong-ho Cho, Mohammad Rakib Uddin, David Seo, Moon-seung Yang, Sang-moon Lee, Sung-hun Lee, Ji-hyun Hur, Eui-chul Hwang
  • Patent number: 9570359
    Abstract: A substrate structure, a complementary metal oxide semiconductor (CMOS) device including the substrate structure, and a method of manufacturing the CMOS device are disclosed, where the substrate structure includes: a substrate, at least one seed layer on the substrate formed of a material including boron (B) and/or phosphorus (P), and a buffer layer on the seed layer. This substrate structure makes it possible to reduce the thickness of the buffer layer and also improve the performance characteristics of a semiconductor device formed with the substrate structure.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: February 14, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-seung Yang, Mohammad Rakib Uddin, Myoung-jae Lee, Sang-moon Lee, Sung-hun Lee, Seong-ho Cho
  • Patent number: 9425104
    Abstract: Provided are a complementary metal oxide semiconductor (CMOS) device and a method of manufacturing the same. In the CMOS device, a buffer layer is disposed on a silicon substrate, and a first layer including a group III-V material is disposed on the buffer layer. A second layer including a group IV material is disposed on the buffer layer or the silicon substrate while being spaced apart from the first layer.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: August 23, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-seung Yang, Mohammad Rakib Uddin, Myoung-jae Lee, Sang-moon Lee, Sung-hun Lee, Seong-ho Cho
  • Publication number: 20160172450
    Abstract: The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer.
    Type: Application
    Filed: February 23, 2016
    Publication date: June 16, 2016
    Inventors: Dong-soo LEE, Myoung-jae LEE, Seong-ho CHO, Mohammad Rakib UDDIN, David SEO, Moon-seung YANG, Sang-moon LEE, Sung-hun LEE, Ji-hyun HUR, Eui-chul HWANG
  • Patent number: 9306008
    Abstract: The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: April 5, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-soo Lee, Myoung-Jae Lee, Seong-ho Cho, Mohammad Rakib Uddin, David Seo, Moon-seung Yang, Sang-moon Lee, Sung-hun Lee, Ji-hyun Hur, Eui-chul Hwang
  • Patent number: 9207469
    Abstract: An athermal optical modulator includes a waveguide, a ring resonator configured to receive light input from the waveguide and output modulated light to the waveguide, the ring resonator including a ridge unit located at a center of the ring resonator in a vertical section, a first contact connected to one side of the ridge unit and a second contact connected to the other side of the ridge unit, the first contact and the second contact forming paths for applying electricity to the ring resonator to form an electric field in the ring resonator, and a polymer layer covering the ridge unit.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: December 8, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon-seung Yang, Seong-ho Cho, Mohammad Rakib Uddin
  • Patent number: 9099304
    Abstract: A semiconductor device is provided that includes a diffusion barrier layer between a compound semiconductor layer and a dielectric layer, as well as a method of fabricating the semiconductor device, such that the semiconductor device includes a compound semiconductor layer; a dielectric layer; and a diffusion barrier layer including an oxynitride formed between the compound semiconductor layer and the dielectric layer.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: August 4, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-soo Lee, Eui-chul Hwang, Seong-ho Cho, Myoung-jae Lee, Sang-moon Lee, Sung-hun Lee, Mohammad Rakib Uddin, David Seo, Moon-seung Yang, Ji-hyun Hur
  • Publication number: 20150069517
    Abstract: Provided are a complementary metal oxide semiconductor (CMOS) device and a method of manufacturing the same. In the CMOS device, a buffer layer is disposed on a silicon substrate, and a first layer including a group III-V material is disposed on the buffer layer. A second layer including a group IV material is disposed on the buffer layer or the silicon substrate while being spaced apart from the first layer.
    Type: Application
    Filed: April 23, 2014
    Publication date: March 12, 2015
    Inventors: Moon-seung YANG, Mohammad Rakib UDDIN, Myoung-jae LEE, Sang-moon LEE, Sung-hun LEE, Seong-ho CHO
  • Publication number: 20150061088
    Abstract: The present disclosure relates to a semiconductor device including an oxygen gettering layer between a group III-V compound semiconductor layer and a dielectric layer, and a method of fabricating the semiconductor device. The semiconductor device may include a compound semiconductor layer; a dielectric layer disposed on the compound semiconductor layer; and an oxygen gettering layer interposed between the compound semiconductor layer and the dielectric layer. The oxygen gettering layer includes a material having a higher oxygen affinity than a material of the compound semiconductor layer.
    Type: Application
    Filed: March 13, 2014
    Publication date: March 5, 2015
    Inventors: Dong-soo LEE, Myoung-Jae LEE, Seong-ho CHO, Mohammad Rakib Uddin, David SEO, Moon-seung YANG, Sang-moon LEE, Sung-hun LEE, Ji-hyun HUR, Eui-chul HWANG
  • Publication number: 20150061030
    Abstract: Provided are semiconductor structures and methods of fabricating the same. The semiconductor structure includes a silicon substrate, at least one semiconductor layer that is grown on the silicon substrate and has a lattice constant in a range from about 1.03 to about 1.09 times greater than that of the silicon substrate, and a buffer layer that is disposed between the silicon substrate and the semiconductor layer and includes a metal silicide compound for lattice matching with the semiconductor layer. Related fabrication methods are also discussed.
    Type: Application
    Filed: August 28, 2014
    Publication date: March 5, 2015
    Inventors: Mohammad Rakib Uddin, Moon-seung Yang, Dong-soo Lee, Myoung-jae Lee, Seong-ho Cho, Eui-chul Hwang