Patents by Inventor Mohammad Reza Kakoee
Mohammad Reza Kakoee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10625752Abstract: A system and a method for error-correction code (“ECC”) error handling is described herein. In one aspect, the system and method may operate an ECC function on raw data. The ECC function may include generating ECC syndrome data by an ECC syndrome data generating module. The ECC syndrome data may be derived from the raw data. The system and a method may further inject a fault based on the ECC syndrome data or the raw data. The system and a method may further determine whether the ECC error detected by the ECC checker corresponds to a malfunction of the ECC function or the fault injected based on the ECC syndrome data or the raw data.Type: GrantFiled: December 12, 2017Date of Patent: April 21, 2020Assignee: Qualcomm IncorporatedInventors: Mohammad Reza Kakoee, Rahul Gulati, Eric Mahurin, Suresh Kumar Venkumahanti, Dexter Chun
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Patent number: 10389379Abstract: Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of testing error-correcting code (ECC) logic. The method includes receiving data for storage in a memory. The method further includes receiving an address indicating a location in the memory to store the data. The method further includes determining if the received address matches at least one of one or more test addresses. The method further includes operating the ECC logic in a normal mode when the received address does not match at least one of the one or more test addresses. The method further includes operating the ECC logic in a test mode when the received address does match at least one of the one or more test addresses.Type: GrantFiled: May 12, 2017Date of Patent: August 20, 2019Assignee: QUALCOMM IncorporatedInventors: Rahul Gulati, Palkesh Jain, Pranjal Bhuyan, Mohammad Reza Kakoee
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Publication number: 20190176838Abstract: A system and a method for error-correction code (“ECC”) error handling is described herein. In one aspect, the system and method may operate an ECC function on raw data. The ECC function may include generating ECC syndrome data by an ECC syndrome data generating module. The ECC syndrome data may be derived from the raw data. The system and a method may further inject a fault based on the ECC syndrome data or the raw data. The system and a method may further determine whether the ECC error detected by the ECC checker corresponds to a malfunction of the ECC function or the fault injected based on the ECC syndrome data or the raw data.Type: ApplicationFiled: December 12, 2017Publication date: June 13, 2019Inventors: Mohammad Reza KAKOEE, Rahul Gulati, Eric Mahurin, Suresh Kumar Venkumahanti, Dexter Chun
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Publication number: 20190132555Abstract: Methods and systems to broadcast sensor outputs in an automotive environment allow sensors such as cameras to output relatively unprocessed (raw) data to two or more different processing circuits where the processing circuits are located in separate and distinct embedded control units (ECUs). A first one of the two or more different processing circuits processes the raw data for human consumption. A second one of the two or more different processing circuits processes the raw data for machine utilization such as for autonomous driving functions. Such an arrangement allows for greater flexibility in utilization of the data from the sensors without imposing undue latency in the processing stream and without compromising key performance indices for human use and machine use.Type: ApplicationFiled: September 7, 2018Publication date: May 2, 2019Inventors: Jeffrey Hao Chu, Rahul Gulati, Robert Hardacker, Alex Jong, Mohammad Reza Kakoee, Behnam Katibian, Anshuman Saxena, Sanjay Vishin, Sanat Kapoor
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Publication number: 20180331692Abstract: Various additional and alternative aspects are described herein. In some aspects, the present disclosure provides a method of testing error-correcting code (ECC) logic. The method includes receiving data for storage in a memory. The method further includes receiving an address indicating a location in the memory to store the data. The method further includes determining if the received address matches at least one of one or more test addresses. The method further includes operating the ECC logic in a normal mode when the received address does not match at least one of the one or more test addresses. The method further includes operating the ECC logic in a test mode when the received address does match at least one of the one or more test addresses.Type: ApplicationFiled: May 12, 2017Publication date: November 15, 2018Inventors: Rahul GULATI, Palkesh JAIN, Pranjal BHUYAN, Mohammad Reza KAKOEE
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Publication number: 20180183417Abstract: In certain aspects, a system comprises a voltage-droop mitigation circuit configured to monitor voltage droop in a supply voltage supplied to a circuit, and to perform voltage-droop mitigation for the circuit if the monitored voltage droop is equal to or greater than a droop threshold. In one aspect, the system also includes a performance monitor configured to track a number of clock cycles over which the voltage-droop mitigation circuit performs the voltage-droop mitigation within a time duration, and to adjust the droop threshold based on the number of clock cycles. In another aspect, the system also includes a performance monitor configured to track a number of times that the voltage-droop mitigation circuit performs the voltage-droop mitigation within a time duration, and to adjust the droop threshold based on the number of times that the voltage-droop mitigation circuit performs the voltage-droop mitigation within the time duration.Type: ApplicationFiled: December 28, 2016Publication date: June 28, 2018Inventors: Lam Ho, Keith Alan Bowman, Navid Toosizadeh, Shih-Hsin Jason Hu, Mohammad Reza Kakoee, Saravana Krishnan Kannan
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Patent number: 10009016Abstract: In certain aspects, a system comprises a voltage-droop mitigation circuit configured to monitor voltage droop in a supply voltage supplied to a circuit, and to perform voltage-droop mitigation for the circuit if the monitored voltage droop is equal to or greater than a droop threshold. In one aspect, the system also includes a performance monitor configured to track a number of clock cycles over which the voltage-droop mitigation circuit performs the voltage-droop mitigation within a time duration, and to adjust the droop threshold based on the number of clock cycles. In another aspect, the system also includes a performance monitor configured to track a number of times that the voltage-droop mitigation circuit performs the voltage-droop mitigation within a time duration, and to adjust the droop threshold based on the number of times that the voltage-droop mitigation circuit performs the voltage-droop mitigation within the time duration.Type: GrantFiled: December 28, 2016Date of Patent: June 26, 2018Assignee: QUALCOMM IncorporatedInventors: Lam Ho, Keith Alan Bowman, Navid Toosizadeh, Shih-Hsin Jason Hu, Mohammad Reza Kakoee, Saravana Krishnan Kannan
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Patent number: 9990024Abstract: A method including receiving an indication of a number of active processing units in a computer processor; in response to receiving the indication, determining an appropriate operating voltage margin for the computer processor; reducing an operating frequency of the active processing units in response to receiving the indication; adjusting a power supply to increase or decrease a voltage to the computer processor in accordance with the appropriate operating voltage margin; and increasing the operating frequency of the active processing units in response to an acknowledgment that the power supply has been adjusted.Type: GrantFiled: September 9, 2015Date of Patent: June 5, 2018Assignee: QUALCOMM IncorporatedInventors: Navid Toosizadeh, Mohammad Reza Kakoee, Shih-Hsin Jason Hu, Mohamed Waleed Allam
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Publication number: 20170068309Abstract: A method including receiving an indication of a number of active processing units in a computer processor; in response to receiving the indication, determining an appropriate operating voltage margin for the computer processor; reducing an operating frequency of the active processing units in response to receiving the indication; adjusting a power supply to increase or decrease a voltage to the computer processor in accordance with the appropriate operating voltage margin; and increasing the operating frequency of the active processing units in response to an acknowledgment that the power supply has been adjusted.Type: ApplicationFiled: September 9, 2015Publication date: March 9, 2017Inventors: Navid Toosizadeh, Mohammad Reza Kakoee, Shih-Hsin Jason Hu, Mohamed Waleed Allam
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Patent number: 9484892Abstract: An integrated circuit compensates for circuit aging by measuring the aging with an aging sensor and controlling a supply voltage based on the measured aging. The operating environment for the aging sensor can be set to reduce impacts of non-aging effects on the measured aging. For example, the operating environment can use a temperature inversion voltage. An initial aging measurement value which is the difference between an initial aged measurement and an initial unaged measurement can be stored on the integrated circuit. A core power reduction controller can use the measured aging and the stored initial aging measurement value to update a performance-sensor target value and then perform adaptive voltage scaling using the using the updated performance-sensor target value.Type: GrantFiled: September 10, 2015Date of Patent: November 1, 2016Assignee: QUALCOMM IncorporatedInventors: Mohammad Reza Kakoee, Shih-Hsin Jason Hu, Min Chen, Jasmin Smaila Ibrahimovic, Carlos Auyon, Sorin Adrian Dobre, Navid Toosizadeh, Nan Chen, Mohamed Waleed Allam
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Patent number: 9400308Abstract: The systems and method described herein provide efficient (e.g., low power and low area) techniques to track performance in numerous supply domains with heterogeneous circuits that are used in a large system-on-a-chip integrated circuit (SoCs). The heterogeneous circuits can include circuits made with different devices, different cell libraries, and different hard macros that are in different power supply domains. Performance measurements from performance sensors (or process-voltage-temperature (PVT) sensors) that are spread about the SoC are collected and processed to determine voltage levels for each of the supply domains. A single controller can receive can determine voltage levels for a whole SoC. The performance sensors are connected to the controller by a scan chain. The techniques are flexible and can be easily adapted for use in SoCs with different power supply domains and types of circuits.Type: GrantFiled: July 3, 2014Date of Patent: July 26, 2016Assignee: QUALCOMM IncorporatedInventors: Jasmin Smaila Ibrahimovic, Mohammad Reza Kakoee, Shih-Hsin Jason Hu
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Publication number: 20160003893Abstract: The systems and method described herein provide efficient (e.g., low power and low area) means to track performance in numerous supply domains with heterogeneous circuits that are used in a large system-on-a-chip integrated circuit (SoCs). The heterogeneous circuits can include circuits made with different devices, different cell libraries, and different hard macros that are in different power supply domains. Performance measurements from performance sensors (or process-voltage-temperature (PVT) sensors) that are spread about the SoC are collected and processed to determine voltage levels for each of the supply domains. A single controller can receive can determine voltage levels for a whole SoC. The performance sensors are connected to the controller by a scan chain. The technique is flexible and can be easily adapted for use in SoCs with different power supply domains and types of circuits.Type: ApplicationFiled: July 3, 2014Publication date: January 7, 2016Inventors: Jasmin Smaila Ibrahimovic, Mohammad Reza Kakoee, Shih-Hsin Jason Hu