Abstract: Provided is a memory system comprising a plurality of memory components; and a controller in communication with the plurality of memory components and configured to perform error correction code (ECC) decoding on a received word read from the plurality of memory components. The ECC decoding is configured to (i) detect one or more random errors in a portion of the received word, the portion corresponding to one of the components within the plurality, and (ii) correct the detected random errors; and when the correcting of the detected random errors fails, iteratively marking symbols in the remaining portions of the received word as erasures.

Abstract: An apparatus can include a number of memory devices and a memory controller coupled to one or more of the number of memory devices. The memory controller can include a row hammer detector. The memory controller can be configured increment for a first time period a row counter in a first data structure and a refresh counter. The memory controller can be configured to increment for a second time period a row counter in a second data structure and the refresh counter. The memory controller can be configured to determine that a value of the refresh counter exceeds a refresh threshold and responsive to the determination that the value of the refresh counter exceeds the refresh threshold, issue a notification.

Abstract: Provided is a memory system comprising an error correction code (ECC) decoder configured to receive data from a memory. The ECC decoder includes a syndrome generator configured to calculate at least one of syndrome vector and an erasure value, the calculation being devoid of erasure location information and an error-location polynomial generator configured to determine error location and error/erasure value polynomials responsive to syndrome and erasure calculation values output from the syndrome generator. An error value generator confirms error values at one or more known error locations based upon the determined error/erasure value polynomials, and an error location generator search for an error evaluation value to confirm the known error locations based upon the determined error location polynomials. Outputs of the error value generator and the error location generator are combined to produce corrected data.

Abstract: Provided is a memory system comprising a plurality of memory components; and a controller in communication with the plurality of memory components and configured to perform error correction code (ECC) decoding on a received word read from the plurality of memory components. The ECC decoding is configured to (i) detect one or more random errors in a portion of the received word, the portion corresponding to one of the components within the plurality, and (ii) correct the detected random errors; and when the correcting of the detected random errors fails, iteratively marking symbols in the remaining portions of the received word as erasures.

Abstract: Memory devices may have an array of elements in two or more dimensions. The memory devices use multiple access lines arranged in a grid to access the memory devices. Memory cells located at intersections of the access lines in the grid. Drivers are used for each access line and configured to transmit a corresponding signal to respective memory cells of the plurality of memory cells via a corresponding access line. The memory devices may use an address scrambler to determine a bit error rate for accessing memory cells and remap an address of a particular memory cell to have a bit error rate below a threshold. In this way, the address scrambler may distribute the bit error rates of multiple accesses of the array.

Abstract: Memory devices may have an array of elements in two or more dimensions. The memory devices use multiple access lines arranged in a grid to access the memory devices. Memory cells located at intersections of the access lines in the grid. Drivers are used for each access line and configured to transmit a corresponding signal to respective memory cells of the plurality of memory cells via a corresponding access line. The memory devices may use an address scrambler to determine a bit error rate for accessing memory cells and remap an address of a particular memory cell to have a bit error rate below a threshold. In this way, the address scrambler may distribute the bit error rates of multiple accesses of the array.

Abstract: Implantable medical devices, systems, methods and kits for transcutaneous insertion of the implantable medical devices are provided.

Abstract: A microturbine engine that includes a compressor that is operable to provide a flow of compressed air. The compressed air flows through a recuperator where it is preheated before delivery to a combustor. The preheated compressed air mixes with a fuel and is combusted within the combustor to provide a flow of products of combustion. The flow of products of combustion pass through one or more turbines to drive the compressor and a synchronous generator. The synchronous generator is able to synchronize to a priority load, to the utility grid or to both depending on the mode of operation. A control system monitors various engine parameters as well as load and grid parameters to determine the desired mode of operation.

Abstract: A microturbine engine that includes a compressor that is operable to provide a flow of compressed air. The compressed air flows through a recuperator where it is preheated before delivery to a combustor. The preheated compressed air mixes with a fuel and is combusted within the combustor to provide a flow of products of combustion. The flow of products of combustion pass through one or more turbines to drive the compressor and a synchronous generator. The synchronous generator is able to synchronize to a priority load, to the utility grid or to both depending on the mode of operation. A control system monitors various engine parameters as well as load and grid parameters to determine the desired mode of operation.

Abstract: A microturbine engine that includes a compressor that is operable to provide a flow of compressed air. The compressed air flows through a recuperator where it is preheated before delivery to a combustor. The preheated compressed air mixes with a fuel and is combusted within the combustor to provide a flow of products of combustion. The flow of products of combustion pass through one or more turbines to drive the compressor and a synchronous generator. The synchronous generator is able to synchronize to a priority load, to the utility grid or to both depending on the mode of operation. A control system monitors various engine parameters as well as load and grid parameters to determine the desired mode of operation.

Abstract: A microturbine engine that includes a compressor that is operable to provide a flow of compressed air. The compressed air flows through a recuperator where it is preheated before delivery to a combustor. The preheated compressed air mixes with a fuel and is combusted within the combustor to provide a flow of products of combustion. The flow of products of combustion pass through one or more turbines to drive the compressor and a synchronous generator. The synchronous generator is able to synchronize to a priority load, to the utility grid or to both depending on the mode of operation. A control system monitors various engine parameters as well as load and grid parameters to determine the desired mode of operation.