Abstract: Tile based interleaving and de-interleaving of row-column interleaved data is described. In one example, the de-interleaving is divided into two memory transfer stages, the first from an on-chip memory to a DRAM and the second from the DRAM to an on-chip memory. Each stage operates on part of a row-column interleaved block of data and re-orders the data items, such that the output of the second stage comprises de-interleaved data. In the first stage, data items are read from the on-chip memory according to a non-linear sequence of memory read addresses and written to the DRAM. In the second stage, data items are read from the DRAM according to bursts of linear address sequences which make efficient use of the DRAM interface and written back to on-chip memory according to a non-linear sequence of memory write addresses.

Abstract: Method, apparatus and systems are disclosed that may be implemented. One method implemented by a transceiver, is directed to transmission via a plurality of beams. The method includes obtaining an input bit stream and bit mapping bits of the input bit stream into at least a first stream and a second stream. The method further includes, generating one or more complex symbols using the first stream, selecting a Space-Time (ST) spreading matrix from a plurality of ST spreading matrices and spreading the generated one or more complex symbols over the selected ST spreading matrix to generate one or more dispersed ST codewords. In this method the transceiver maps the one or more dispersed ST codewords to a plurality of beams and transmits the mapped one or more dispersed ST codewords over the plurality of beams.

Abstract: Some embodiments of a method may include: obtaining input data comprising a user equipment location, a number of user equipments, and a desired receive signal strength; processing the input data with a neural network having weights determined from a training phase to generate a set of one or more beam-pair indices; performing a beam search over at least a subset of the set of beam-pair indices; and receiving at least one beam-pair index from a vehicle that provides a desired received signal strength.

Abstract: An example disclosed method includes (i) modulating a first type of uplink information using beam direction modulation with an uplink beam direction pattern applied over a set of allocated uplink radio resource, (ii) modulating a second type of uplink information using an in-phase quadrature (IQ)-based modulation scheme, wherein modulation symbols of the IQ-based modulation scheme are transmitted on a plurality of uplink beams used to modulate the first type of uplink information across same set of allocated uplink radio resources as the set of allocated uplink radio resources used for the beam direction modulation, (iii) and transmitting the modulated first type of uplink information and the modulated second type of uplink information over an air interface.

Abstract: Tile based interleaving and de-interleaving of row-column interleaved data is described. In one example, the de-interleaving is divided into two memory transfer stages, the first from an on-chip memory to a DRAM and the second from the DRAM to an on-chip memory. Each stage operates on part of a row-column interleaved block of data and re-orders the data items, such that the output of the second stage comprises de-interleaved data. In the first stage, data items are read from the on-chip memory according to a non-linear sequence of memory read addresses and written to the DRAM. In the second stage, data items are read from the DRAM according to bursts of linear address sequences which make efficient use of the DRAM interface and written back to on-chip memory according to a non-linear sequence of memory write addresses.

Abstract: Tile based interleaving and de-interleaving of row-column interleaved data is described. In one example, the de-interleaving is divided into two memory transfer stages, the first from an on-chip memory to a DRAM and the second from the DRAM to an on-chip memory. Each stage operates on part of a row-column interleaved block of data and re-orders the data items, such that the output of the second stage comprises de-interleaved data. In the first stage, data items are read from the on-chip memory according to a non-linear sequence of memory read addresses and written to the DRAM. In the second stage, data items are read from the DRAM according to bursts of linear address sequences which make efficient use of the DRAM interface and written back to on-chip memory according to a non-linear sequence of memory write addresses.

Abstract: Base stations and user terminals may adaptively configure a digital precoder codebook for mmWave-based hybrid beamforming, such as by determining at least one analog beamformer and combiner, determining at the user terminal a lowest codebook resolution of digital precoding that can be used to achieve at least one performance parameter, and communicating to the base station the determined lowest codebook resolution of digital precoding. The adjustment of digital precoder codebook resolution, on top of analog beamforming, across different radio resources (e.g. time/frequency) may optimize feedback efficiency for a user terminal. In some cases, the user terminal may also receive from a base station an assistance parameter relating to an achievable performance gain using digital precoding. The user terminal may use the received assistance parameter in determining the digital precoder codebook resolution.

Abstract: Base stations and user terminals may adaptively configure a digital precoder codebook for mmWave-based hybrid beamforming, such as by determining at least one analog beamformer and combiner, determining at the user terminal a lowest codebook resolution of digital precoding that can be used to achieve at least one performance parameter, and communicating to the base station the determined lowest codebook resolution of digital precoding. The adjustment of digital precoder codebook resolution, on top of analog beamforming, across different radio resources (e.g. time/frequency) may optimize feedback efficiency for a user terminal. In some cases, the user terminal may also receive from a base station an assistance parameter relating to an achievable performance gain using digital precoding. The user terminal may use the received assistance parameter in determining the digital precoder codebook resolution.

Abstract: An example disclosed method includes (i) modulating a first type of uplink information using beam direction modulation with an uplink beam direction pattern applied over a set of allocated uplink radio resource, (ii) modulating a second type of uplink information using an in-phase quadrature (IQ)-based modulation scheme, wherein modulation symbols of the IQ-based modulation scheme are transmitted on a plurality of uplink beams used to modulate the first type of uplink information across same set of allocated uplink radio resources as the set of allocated uplink radio resources used for the beam direction modulation, (iii) and transmitting the modulated first type of uplink information and the modulated second type of uplink information over an air interface.

Abstract: Tile based interleaving and de-interleaving of row-column interleaved data is described. In one example, the de-interleaving is divided into two memory transfer stages, the first from an on-chip memory to a DRAM and the second from the DRAM to an on-chip memory. Each stage operates on part of a row-column interleaved block of data and re-orders the data items, such that the output of the second stage comprises de-interleaved data. In the first stage, data items are read from the on-chip memory according to a non-linear sequence of memory read addresses and written to the DRAM. In the second stage, data items are read from the DRAM according to bursts of linear address sequences which make efficient use of the DRAM interface and written back to on-chip memory according to a non-linear sequence of memory write addresses.

Abstract: Tile based interleaving and de-interleaving of row-column interleaved data is described. In one example, the de-interleaving is divided into two memory transfer stages, the first from an on-chip memory to a DRAM and the second from the DRAM to an on-chip memory. Each stage operates on part of a row-column interleaved block of data and re-orders the data items, such that the output of the second stage comprises de-interleaved data. In the first stage, data items are read from the on-chip memory according to a non-linear sequence of memory read addresses and written to the DRAM. In the second stage, data items are read from the DRAM according to bursts of linear address sequences which make efficient use of the DRAM interface and written back to on-chip memory according to a non-linear sequence of memory write addresses.

Abstract: Tile based interleaving and de-interleaving of row-column interleaved data is described. In one example, the de-interleaving is divided into two memory transfer stages, the first from an on-chip memory to a DRAM and the second from the DRAM to an on-chip memory. Each stage operates on part of a row-column interleaved block of data and re-orders the data items, such that the output of the second stage comprises de-interleaved data. In the first stage, data items are read from the on-chip memory according to a non-linear sequence of memory read addresses and written to the DRAM. In the second stage, data items are read from the DRAM according to bursts of linear address sequences which make efficient use of the DRAM interface and written back to on-chip memory according to a non-linear sequence of memory write addresses.

Abstract: Tile based interleaving and de-interleaving of row-column interleaved data is described. In one example, the de-interleaving is divided into two memory transfer stages, the first from an on-chip memory to a DRAM and the second from the DRAM to an on-chip memory. Each stage operates on part of a row-column interleaved block of data and re-orders the data items, such that the output of the second stage comprises de-interleaved data. In the first stage, data items are read from the on-chip memory according to a non-linear sequence of memory read addresses and written to the DRAM. In the second stage, data items are read from the DRAM according to bursts of linear address sequences which make efficient use of the DRAM interface and written back to on-chip memory according to a non-linear sequence of memory write addresses.

Abstract: Methods and apparatus for efficient demapping of constellations are described. In an embodiment, these methods may be implemented within a digital communications receiver, such as a Digital Terrestrial Television receiver. The method reduces the number of distance metric calculations which are required to calculate soft information in the demapper by locating the closest constellation point to the received symbol. This closest constellation point is identified based on a comparison of distance metrics which are calculated parallel to either the I- or Q-axis. The number of distance metric calculations may be reduced still further by identifying a local minimum constellation point for each bit in the received symbol and these constellation points are identified using a similar method to the closest constellation point. Where the system uses rotated constellations, the received symbol may be unrotated before any constellation points are identified.

Abstract: Methods and apparatus for efficient demapping of constellations are described. In an embodiment, these methods may be implemented within a digital communications receiver, such as a Digital Terrestrial Television receiver. The method reduces the number of distance metric calculations which are required to calculate soft information in the demapper by locating the closest constellation point to the received symbol. This closest constellation point is identified based on a comparison of distance metrics which are calculated parallel to either the I- or Q-axis. The number of distance metric calculations may be reduced still further by identifying a local minimum constellation point for each bit in the received symbol and these constellation points are identified using a similar method to the closest constellation point. Where the system uses rotated constellations, the received symbol may be unrotated before any constellation points are identified.

Abstract: Methods and apparatus for efficient demapping of constellations are described. In an embodiment, these methods may be implemented within a digital communications receiver, such as a Digital Terrestrial Television receiver. The method reduces the number of distance metric calculations which are required to calculate soft information in the demapper by locating the closest constellation point to the received symbol. This closest constellation point is identified based on a comparison of distance metrics which are calculated parallel to either the I- or Q-axis. The number of distance metric calculations may be reduced still further by identifying a local minimum constellation point for each bit in the received symbol and these constellation points are identified using a similar method to the closest constellation point. Where the system uses rotated constellations, the received symbol may be unrotated before any constellation points are identified.

Abstract: Noise variance estimation and interference detection is described. In one example, a method of estimating noise variance is described in which the pilots within a received OFDM signal are divided into bands and then a noise variance estimate is calculated on a per-band basis by averaging the noise estimates for those pilots within the band. In some examples, the pilots are divided into bands in frequency and in other examples, the pilots are divided into bands in frequency and time, such that noise estimates from more than one OFDM symbol are used in calculating the per-band noise variance estimates. The noise variance estimate for a pilot is then set to the noise variance estimate for the band which contains the pilot. The noise variance estimate for a data sub-carrier can then be determined by interpolating between the values for the pilots.

Abstract: Methods and apparatus for efficient demapping of constellations are described. In an embodiment, these methods may be implemented within a digital communications receiver, such as a Digital Terrestrial Television receiver. The method reduces the number of distance metric calculations which are required to calculate soft information in the demapper by locating the closest constellation point to the received symbol. This closest constellation point is identified based on a comparison of distance metrics which are calculated parallel to either the I- or Q-axis. The number of distance metric calculations may be reduced still further by identifying a local minimum constellation point for each bit in the received symbol and these constellation points are identified using a similar method to the closest constellation point. Where the system uses rotated constellations, the received symbol may be unrotated before any constellation points are identified.

Abstract: Methods and apparatus for efficient demapping of constellations are described. In an embodiment, these methods may be implemented within a digital communications receiver, such as a Digital Terrestrial Television receiver. The method reduces the number of distance metric calculations which are required to calculate soft information in the demapper by locating the closest constellation point to the received symbol. This closest constellation point is identified based on a comparison of distance metrics which are calculated parallel to either the I- or Q-axis. The number of distance metric calculations may be reduced still further by identifying a local minimum constellation point for each bit in the received symbol and these constellation points are identified using a similar method to the closest constellation point. Where the system uses rotated constellations, the received symbol may be unrotated before any constellation points are identified.

Abstract: Tile based interleaving and de-interleaving of row-column interleaved data is described. In one example, the de-interleaving is divided into two memory transfer stages, the first from an on-chip memory to a DRAM and the second from the DRAM to an on-chip memory. Each stage operates on part of a row-column interleaved block of data and re-orders the data items, such that the output of the second stage comprises de-interleaved data. In the first stage, data items are read from the on-chip memory according to a non-linear sequence of memory read addresses and written to the DRAM. In the second stage, data items are read from the DRAM according to bursts of linear address sequences which make efficient use of the DRAM interface and written back to on-chip memory according to a non-linear sequence of memory write addresses.