Abstract: The present invention is directed to integrated circuits and methods thereof. More specifically, embodiments of the present invention provide a local correction for bending communication line pairs. In an IC package, a pair of communication lines is used to provide a physical link for data communication between two or more components. At regions where the pair of communication lines is bent, the inner bend line is extended in length and shaped to match the length of the outer bend line while preserving integrity of its signal propagation characteristics, thereby providing local phase correction. There are other embodiments as well.

Abstract: The present invention is directed to integrated circuits and methods thereof. More specifically, embodiments of the present invention provide a local correction for bending communication line pairs. In an IC package, a pair of communication lines is used to provide a physical link for data communication between two or more components. At regions where the pair of communication lines is bent, the inner bend line is extended in length and shaped to match the length of the outer bend line while preserving integrity of its signal propagation characteristics, thereby providing local phase correction. There are other embodiments as well.

Abstract: The present invention is directed to integrated circuits and methods thereof. More specifically, embodiments of the present invention provide a local correction for bending communication line pairs. In an IC package, a pair of communication lines is used to provide a physical link for data communication between two or more components. At regions where the pair of communication lines is bent, the inner bend line is extended in length and shaped to match the length of the outer bend line while preserving integrity of its signal propagation characteristics, thereby providing local phase correction. There are other embodiments as well.

Abstract: Described herein are an apparatus, system, and method having a compact symmetrical transition structure for RF applications. The apparatus comprises: first and second ground planes each of which having respective truncated edges, the first and second ground planes being parallel to one another and separated by a multi-layer substrate; a strip line positioned between the first and second ground planes; and a symmetrical transition structure, coupled to the strip line and the first and second ground planes near their respective truncated edges, and further coupled to a broadside coupled line (BCL).

Abstract: Described herein are an apparatus, system, and method having a compact symmetrical transition structure for RF applications. The apparatus comprises: first and second ground planes each of which having respective truncated edges, the first and second ground planes being parallel to one another and separated by a multi-layer substrate; a strip line positioned between the first and second ground planes; and a symmetrical transition structure, coupled to the strip line and the first and second ground planes near their respective truncated edges, and further coupled to a broadside coupled line (BCL).

Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a substrate having top, middle and bottom layers, an array of millimeter-wave antennas embedded on the top layer of the substrate and a monolithic microwave integrated circuit (MMIC) mounted on the bottom layer of the substrate. In one embodiment, the second level interconnect for surface-mounting on a printed circuit board (PCB) is provided on the bottom layer of the substrate.

Abstract: A high-speed multiple channel and line selector switch allows the simultaneous selection of the two lines of a differential channel and permits the simultaneous selection of multiple channels by introduction of the appropriate high speed pad connectivity.

Abstract: A millimeter-wave integrated circuit (IC) package is disclosed. The package includes a substrate having a plurality of layers and a vertical interconnection. The vertical interconnection comprises a shielded transition between the plurality of layers and a compensation structure to minimize the parasitic effect of the transition.

Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a substrate having top, middle and bottom layers, an array of millimeter-wave antennas embedded on the top layer of the substrate and a monolithic microwave integrated circuit (MMIC) mounted on the bottom layer of the substrate. In one embodiment, the second level interconnect for surface-mounting on a printed circuit board (PCB) is provided on the bottom layer of the substrate.

Abstract: A flexible circuit having vias disposed to minimize discontinuity in a ground plane separating opposing transmission lines. The flex circuit comprises a first transmission line coupled to a first surface, a second transmission line coupled to a second opposing surface and a ground plane separating the first transmission line and the second transmission line. The flexible circuit also includes a first type of electrical connection pads disposed on the first surface, and electrically coupled to the first transmission line. The flexible circuit also includes a second type of electrical connection pads disposed on the second surface, and electrically coupled to the second transmission line wherein the second type of electrical connection pads have a higher areal density than the first type of electrical connection pads.

Abstract: A driver IC and EML array are electrically coupled to one another via a flexible PCB. Thermal isolation between the driver IC and EML array is adjusted by varying a cross-section and length of electrically-conductive traces on the PCB.

Abstract: An embodiment in accordance with the invention recites a high speed channel selector switch. The high speed channel selector switch includes a first unit that has a plurality of contacts that are operable to electrically couple to a plurality of high speed data lines of a device under test. The first unit also has an additional contact operable to electrically couple to a signal line. The high speed channel selector switch further includes a second unit that is operable to selectively electrically couple one of the plurality of contacts of the first unit to the additional contact of the first unit. The second unit also electrically couples the remaining contacts of the first unit to respective termination impedances. Thus, one of the plurality of high speed data lines is coupled to the signal line via the second unit and the remaining high speed data lines are coupled to respective termination impedances.

Abstract: A driver IC and EML array are electrically coupled to one another via a flexible PCB. Thermal isolation between the driver IC and EML array is adjusted by varying a cross-section and length of electrically-conductive traces on the PCB.