Patents by Inventor Mohammed Fazil Fayaz

Mohammed Fazil Fayaz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods for controlling wafer curvature
    Patent number: 8918988
    Abstract: Methods and structures for controlling wafer curvature during fabrication of integrated circuits caused by stressed films. The methods include controlling the conductor density of wiring levels, adding compensating stressed film layers and disturbing the continuity of stress films with the immediately lower layer. The structure includes integrated circuits having compensating stressed film layers.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: December 30, 2014
    Assignee: International Business Machines Corporation
    Inventors: Mohammed Fazil Fayaz, Jeffery Burton Maxson, Anthony Kendall Stamper, Daniel Scott Vanslette
  • METHODS AND STRUCTURES FOR CONTROLLING WAFER CURVATURE
    Publication number: 20120329265
    Abstract: Methods and structures for controlling wafer curvature during fabrication of integrated circuits caused by stressed films. The methods include controlling the conductor density of wiring levels, adding compensating stressed film layers and disturbing the continuity of stress films with the immediately lower layer. The structure includes integrated circuits having compensating stressed film layers.
    Type: Application
    Filed: September 6, 2012
    Publication date: December 27, 2012
    Applicant: International Business Machines Corporation
    Inventors: Mohammed Fazil Fayaz, Jeffery Burton Maxson, Anthony Kendall Stamper, Daniel Scott Vanslette
  • Methods and structures for controlling wafer curvature
    Patent number: 8299615
    Abstract: Methods and structures for controlling wafer curvature during fabrication of integrated circuits caused by stressed films. The methods include controlling the conductor density of wiring levels, adding compensating stressed film layers and disturbing the continuity of stress films with the immediately lower layer. The structure includes integrated circuits having compensating stressed film layers.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventors: Mohammed Fazil Fayaz, Jeffery Burton Maxson, Anthony Kendall Stamper, Daniel Scott Vanslette
  • METHODS AND STRUCTURES FOR CONTROLLING WAFER CURVATURE
    Publication number: 20110049723
    Abstract: Methods and structures for controlling wafer curvature during fabrication of integrated circuits caused by stressed films. The methods include controlling the conductor density of wiring levels, adding compensating stressed film layers and disturbing the continuity of stress films with the immediately lower layer. The structure includes integrated circuits having compensating stressed film layers.
    Type: Application
    Filed: August 26, 2009
    Publication date: March 3, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mohammed Fazil Fayaz, Jeffery Burton Maxson, Anthony Kendall Stamper, Daniel Scott Vanslette
  • Reduced splattering of unpassivated laser fuses
    Patent number: 6872648
    Abstract: The act of blowing an unpassivated electrical fuse (for example, fuse 405) using a laser can result in the splattering of the fuse material and result in electrical short circuits. A blast barrier (for example blast barrier 406) formed around an area of the fuse that is blown by the laser helps to contain the splattering of the fuse material. The blast barrier may be formed from the same material as the fuses themselves and, therefore, can be created in the same fabrication step.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: March 29, 2005
    Assignees: Infineon Technologies AG, International Business Machines Corporation
    Inventors: Gerald R. Friese, Andy Cowley, Mohammed Fazil Fayaz, William T. Motsiff
  • Via density rules
    Patent number: 6864171
    Abstract: Thermo-mechanical stress on vias is reduced, thereby reducing related failures. This can be done by maintaining a via-to-metal area ratio at least as large as a predetermined value below which the additional stress on the vias does not significantly increase.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: March 8, 2005
    Assignee: Infineon Technologies AG
    Inventors: Mark D. Hoinkis, Matthias P. Hierlemann, Mohammed Fazil Fayaz, Andy Cowley, Erdum Kaltalioglu
  • Selective silicidation scheme for memory devices
    Patent number: 6849495
    Abstract: A memory device and method of manufacturing thereof, wherein a silicide material is selectively formed over active regions of a memory device. A silicide material may also be formed on the top surface of wordlines adjacent the active regions during the selective silicidation process. A single nitride insulating layer is used, and portions of the workpiece are covered with photoresist during the formation of the silicide material.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: February 1, 2005
    Assignee: Infineon Technologies AG
    Inventors: Paul Wensley, Mohammed Fazil Fayaz, Martin Commons
  • Selective silicidation scheme for memory devices
    Publication number: 20040171213
    Abstract: A memory device and method of manufacturing thereof, wherein a silicide material is selectively formed over active regions of a memory device. A silicide material may also be formed on the top surface of wordlines adjacent the active regions during the selective silicidation process. A single nitride insulating layer is used, and portions of the workpiece are covered with photoresist during the formation of the silicide material.
    Type: Application
    Filed: February 28, 2003
    Publication date: September 2, 2004
    Inventors: Paul Wensley, Mohammed Fazil Fayaz, Martin Commons
  • Reduced splattering of unpassivated laser fuses
    Publication number: 20040056322
    Abstract: The act of blowing an unpassivated electrical fuse (for example, fuse 405) using a laser can result in the splattering of the fuse material and result in electrical short circuits. A blast barrier (for example blast barrier 406) formed around an area of the fuse that is blown by the laser helps to contain the splattering of the fuse material. The blast barrier may be formed from the same material as the fuses themselves and therefore, can be created in the same fabrication step.
    Type: Application
    Filed: September 19, 2002
    Publication date: March 25, 2004
    Inventors: Gerald R. Friese, Andy Cowley, Mohammed Fazil Fayaz, William T. Motsiff
  • MIMcap top plate pull-back
    Patent number: 6693017
    Abstract: A MIM capacitor includes a bottom plate, a capacitor dielectric disposed over the bottom plate, and a top plate disposed over the capacitor dielectric. An etch stop material is disposed over the top plate, and the top plate has a width that is less than the width of the etch stop material width. The top plate edges may be pulled back during the removal of the resist used to pattern the top plate, by the addition of chemistries in the resist etch that are adapted to pull-back or undercut the top plate edges beneath the etch stop material.
    Type: Grant
    Filed: April 4, 2003
    Date of Patent: February 17, 2004
    Assignees: Infineon Technologies AG, International Business Machines Corp.
    Inventors: Mohammed Fazil Fayaz, Haining Yang, Uwe Kerst, Joseph J. Mezzapelle