Patents by Inventor Mohammed K. Rashid

Mohammed K. Rashid has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of stimulating die circuitry and structure therefor
    Patent number: 7741195
    Abstract: A method includes providing a wafer having a first die and a scribe grid, where the first die has die circuitry and a bond pad electrically connected to the die circuitry, and where the scribe grid has a scribe grid pad electrically connected to the die circuitry. The method further includes accessing the scribe grid pad to stimulate the die circuitry. A wafer includes a first die. The first die includes die circuitry, a plurality of conductive layers, and a bond pad electrically connected to the die circuitry via at least one conductive layer of the plurality of conductive layers. The wafer includes a scribe grid having a scribe grid pad, and an interconnect electrically connecting the scribe grid pad to the die circuitry. The plurality of die of the wafer can then be singulated, and at least one of the singulated die can be packaged.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: June 22, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mohammed K. Rashid, Mahbub M. Rashed, Scott S. Roth
  • METHOD OF STIMULATING DIE CIRCUITRY AND STRUCTURE THEREFOR
    Publication number: 20070275539
    Abstract: A method includes providing a wafer having a first die and a scribe grid, where the first die has die circuitry and a bond pad electrically connected to the die circuitry, and where the scribe grid has a scribe grid pad electrically connected to the die circuitry. The method further includes accessing the scribe grid pad to stimulate the die circuitry. A wafer includes a first die. The first die includes die circuitry, a plurality of conductive layers, and a bond pad electrically connected to the die circuitry via at least one conductive layer of the plurality of conductive layers. The wafer includes a scribe grid having a scribe grid pad, and an interconnect electrically connecting the scribe grid pad to the die circuitry. The plurality of die of the wafer can then be singulated, and at least one of the singulated die can be packaged.
    Type: Application
    Filed: May 26, 2006
    Publication date: November 29, 2007
    Inventors: Mohammed K. Rashid, Mahbub M. Rashed, Scott S. Roth