Patents by Inventor Mohammed Ranjbar

Mohammed Ranjbar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Subranging digital to time converter-based fractional phase locked loop architecture
    Patent number: 12603655
    Abstract: Embodiments included herein are directed towards a subranging digital to time converter-based fractional phase locked loop circuit. The circuit may include a digital to time converter and a phase detector circuit configured to receive a reference frequency and an output of the digital to time converter. The circuit may further include a phase frequency detector/charge pump circuit configured to receive the reference frequency and the output of the digital to time converter. The circuit may also include a loop filter and voltage-controlled oscillator circuit configured to receive an output of the phase frequency detector/charge pump circuit. The circuit may further include a divider circuit configured to receive an output of the voltage-controlled oscillator circuit and to transmit a signal to the digital to time converter.
    Type: Grant
    Filed: April 2, 2024
    Date of Patent: April 14, 2026
    Assignee: Cadence Design Systems, Inc.
    Inventors: Sudipta Sarkar, Angus McLaren, Meenakshi S., Priya T K, Srivatsa Ranganatha, Mohammed Ranjbar, Paul Lee, Shwetabh Verma, George Chung Fai Ng