Abstract: The present invention relates to a modular configuration of the launch vehicle system. More specifically, it relates to the modular configuration technology developed to optimise the launch vehicle with respect to the number of engines in the lower stage or the number of stages itself in order to get a most efficient launch possible for a particular payload being launched. In the present invention the vehicle is such that the modularity is passed down to sub-system level which thereby reduces the mass of unused components and the modifiable cluster can be used as a booster unit to carry heavier payloads to higher orbits. Depending upon the mass of the payload to be carried to a particular orbit, either the number of stages or the number of engines, are either attached or removed from the vehicle and thus increasing the efficiency of the trajectory. The present invention reduces the time and cost involved in reconfiguration as well.

Abstract: A combined launch vehicle and satellite system relates to the satellite combined with the launch vehicle's upper stage to provide a more efficient system that includes tank separation technology which allows the satellite system to shed tanks that have used up all the propellants stored therein. The method separation of the tank set is enabled by using a merman band or pneumatic type of separation system; wherein the three bottom tanks are emptied first during the process, followed by the separation of the emptied tanks herein the fuel is completely filled in the second set of tanks. The first pair of tanks is then separated after the fuel is emptied. Similarly, the plumbing lines are also separated. The separation of the used components is achieved herein and the satellite is ready for orbit insertion.

Abstract: Disclosed herein is a single piece, integrated, light weighted, cost-effective 3D printed engine for space vehicles. FIG. 5 illustrates an integrated engine that comprises a combustion chamber to burn the fuel, an injector plate (504) to inject the fuel to the combustion chamber, an igniter (502) to ignite the fuel mixture, a nozzle (506) to pass hot gas to produce thrust and cooling channels (508) for regenerative cooling, where all these components are fused to form a single piece integrated engine. The engine of the present invention eliminates the need of assembling the individual components. Further, the engine is additively manufactured with high grade aerospace materials. Thus, the cost and mass of the engine is reduced when compared to traditionally manufactured engines, which leads to frequent missions.

Abstract: A multi-level switched capacitor boost inverter includes a series connection of a two-switched capacitor circuit, a source module and at least one one-switched capacitor circuit. Level-shifted pulse width modulation is used to apply gate pulses to the switches. The multi-level switched capacitor boost inverter uses only three capacitors and a single DC voltage source to generate thirteen voltage levels at load terminals with a voltage gain of three. The capacitors of the two-switched capacitor circuit are self-balancing. Additional one-switched capacitor circuits can be added in series with the inverter. Each additional one-switched capacitor circuit increases the number of levels and increases the gain by one.

Abstract: A multi-level switched capacitor boost inverter includes a series connection of a two-switched capacitor circuit, a source module and at least one one-switched capacitor circuit. Level-shifted pulse width modulation is used to apply gate pulses to the switches. The multi-level switched capacitor boost inverter uses only three capacitors and a single DC voltage source to generate thirteen voltage levels at load terminals with a voltage gain of three. The capacitors of the two-switched capacitor circuit are self-balancing. Additional one-switched capacitor circuits can be added in series with the inverter. Each additional one-switched capacitor circuit increases the number of levels and increases the gain by one.

Abstract: An 11 level boost active neutral point clamped (BANPC) inverter using four capacitors and a single DC voltage source to generate eleven voltage levels at load terminals with a voltage gain of 2.5. A minimum of switching elements are used. Gate pulses for the switches are generated using nearest level control pulse width modulation (NLC-PWM). The capacitors of the 11 level boost active neutral point clamped inverter are self-balancing.

Abstract: An 11 level boost active neutral point clamped (BANPC) inverter using four capacitors and a single DC voltage source to generate eleven voltage levels at load terminals with a voltage gain of 2.5. A minimum of switching elements are used. Gate pulses for the switches are generated using nearest level control pulse width modulation (NLC-PWM). The capacitors of the 11 level boost active neutral point clamped inverter are self-balancing.

Abstract: An 11 level boost active neutral point clamped (BANPC) inverter using four capacitors and a single DC voltage source to generate eleven voltage levels at load terminals with a voltage gain of 2.5. A minimum of switching elements are used. Gate pulses for the switches are generated using nearest level control pulse width modulation (NLC-PWM). The capacitors of the 11 level boost active neutral point clamped inverter are self-balancing.

Abstract: A multi-level switched capacitor boost inverter includes a series connection of a two-switched capacitor circuit, a source module and at least one one-switched capacitor circuit. Level-shifted pulse width modulation is used to apply gate pulses to the switches. The multi-level switched capacitor boost inverter uses only three capacitors and a single DC voltage source to generate thirteen voltage levels at load terminals with a voltage gain of three. The capacitors of the two-switched capacitor circuit are self-balancing. Additional one-switched capacitor circuits can be added in series with the inverter. Each additional one-switched capacitor circuit increases the number of levels and increases the gain by one.

Abstract: A multi-level switched capacitor boost inverter includes a series connection of a two-switched capacitor circuit, a source module and at least one one-switched capacitor circuit. Level-shifted pulse width modulation is used to apply gate pulses to the switches. The multi-level switched capacitor boost inverter uses only three capacitors and a single DC voltage source to generate thirteen voltage levels at load terminals with a voltage gain of three. The capacitors of the two-switched capacitor circuit are self-balancing. Additional one-switched capacitor circuits can be added in series with the inverter. Each additional one-switched capacitor circuit increases the number of levels and increases the gain by one.

Abstract: A transconductance amplifier having an input terminal for receiving an input signal and an output terminal for communicating an output signal based on the input signal, the transconductance amplifier may include a gain transistor and a variable capacitance. The gain transistor may have a gate terminal, a first non-gate terminal, and a second non-gate terminal, the first non-gate terminal coupled to the output terminal of the transconductance amplifier. The variable capacitance may be coupled between the gate terminal of the gain transistor and the second non-gate terminal of the gain transistor.

Abstract: A method may include reconfigurably enabling one of a first downconverter and a second converter and disabling the other the second downconverter, wherein the first downconverter and the second downconverter are integral to a receiver unit of as wireless communications terminal. The method may also include frequency downconverting received wireless communication signals by the enabled downconverter. The method may also include processing the downconverted wireless communication signals by a primary path if the first downconverter is enabled, and processing the downconverted wireless communication signals by a diversity path if the second downconverter is enabled.

Abstract: A transconductance amplifier having an input terminal for receiving an input signal and an output terminal for communicating an output signal based on the input signal, the transconductance amplifier may include a gain transistor and a variable capacitance. The gain transistor may have a gate terminal, a first non-gate terminal, and a second non-gate terminal, the first non-gate terminal coupled to the output terminal of the transconductance amplifier. The variable capacitance may be coupled between the gate terminal of the gain transistor and the second non-gate terminal of the gain transistor.

Abstract: A method may include reconfigurably enabling one of a first downconverter and a second converter and disabling the other the second downconverter, wherein the first downconverter and the second downconverter are integral to a receiver unit of as wireless communications terminal. The method may also include frequency downconverting received wireless communication signals by the enabled downconverter. The method may also include processing the downconverted wireless communication signals by a primary path if the first downconverter is enabled, and processing the downconverted wireless communication signals by a diversity path if the second downconverter is enabled.

Abstract: System and method for receiving purchase information for a client system, e.g., a measurement system. A configuration diagram visually representing a current configuration of the client system is displayed. Multiple product icons are displayed representing products (hardware and/or programs) available for use in the client system. User input is received graphically associating at least one first product icon with the configuration diagram, where the first product icon represents a first product, and the user input indicates a desire to purchase the first product. An updated configuration diagram is displayed representing the configuration of the client system after receiving the user input, including the first product icon. Pricing information for the first product is displayed in response to receiving the user input. User input initiating purchase of the first product may be received in response to displaying the pricing information, and the product may be provided to the user.

Abstract: System and method for receiving purchase information for a client system, e.g., a measurement system. A configuration diagram visually representing a current configuration of the client system is displayed. Multiple product icons are displayed representing products (hardware and/or programs) available for use in the client system. User input is received graphically associating at least one first product icon with the configuration diagram, where the first product icon represents a first product, and the user input indicates a desire to purchase the first product. An updated configuration diagram is displayed representing the configuration of the client system after receiving the user input, including the first product icon. Pricing information for the first product is displayed in response to receiving the user input. User input initiating purchase of the first product may be received in response to displaying the pricing information, and the product may be provided to the user.

Abstract: System and method for merging graphical programs. Information is received regarding first, second, and third graphical programs, where the third graphical program is an ancestor graphical program of the first and second. The information is analyzed to determine differences among the graphical programs. The first and second graphical programs are merged based on the determined differences, generating a merged graphical program, which is displayed.

Abstract: System and method for merging differences between graphical programs. Information is received regarding matches and differences, e.g., in hardware, software, configuration, and/or connectivity, between first and second graphical programs, each comprising respective pluralities of interconnected nodes. The information is analyzed to merge differences between the first and second graphical programs, e.g., for each difference: removing all non-common nodes and connections thereto in the second sub-graph from the second graphical program, adding all common nodes and connections thereto in the first sub-graph to the second graphical program, determining all edges in the first sub-graph that connect common nodes to non-common nodes; and for each determined edge, adding to the second graphical program an edge that connects a corresponding common node in the second sub-graph with a corresponding non-common node added from the first sub-graph. A merged graphical program is displayed on a display, e.g.

Abstract: System and method for determining and/or merging differences between configuration diagrams. First information is received regarding a first configuration diagram comprising a first plurality of nodes and graphically representing a first system, and second information is received regarding a second configuration diagram comprising a first plurality of nodes and graphically representing a second system. At least a portion of the nodes may correspond to hardware devices, programs, and/or configuration data of the respective systems, and may be interconnected. The first and second information is analyzed to determine and/or merge differences between the first configuration diagram and the second configuration diagram, e.g., differences between hardware, software, configuration, and/or connectivity, e.g., by traversing the configuration diagrams or data structures representing the diagrams. An indication of the differences and/or a merged configuration diagram may be displayed on a display device, e.g.

Abstract: System and method for determining and/or merging differences between configuration diagrams. First information is received regarding a first configuration diagram comprising a first plurality of nodes and graphically representing a first system, and second information is received regarding a second configuration diagram comprising a first plurality of nodes and graphically representing a second system. At least a portion of the nodes may correspond to hardware devices, programs, and/or configuration data of the respective systems, and may be interconnected. The first and second information is analyzed to determine and/or merge differences between the first configuration diagram and the second configuration diagram, e.g., differences between hardware, software, configuration, and/or connectivity, e.g., by traversing the configuration diagrams or data structures representing the diagrams. An indication of the differences and/or a merged configuration diagram may be displayed on a display device, e.g.