Patents by Inventor Mohammed Tatar

Mohammed Tatar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8982910
    Abstract: A fixed Generic Mapping Procedure (GMP) apparatus and method are provided to map client data to an optical transport frame. Client data to be mapped into a payload field of an optical transport frame is received and store in a memory. Timing information is generated based on bit and fractional bit granularity of client data mapped into the payload field of successive optical transport frames for use in recovering the client data from received optical transport frames.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: March 17, 2015
    Assignee: Cisco Technology, Inc.
    Inventors: Qian Zhang, Mohammed Tatar, Gary Nicholl, Tim Webster, Christopher Chan
  • Publication number: 20070283073
    Abstract: A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and the network interfaces; a control bus coupled to the host system for controlling and monitoring the port adapter; and interface logic that interfaces the SPI-4 bus and the control bus to the network interfaces. Methods are provided for selecting and using one of a small plurality of different packet formats for various networking technologies, so that the port adapter can hide details of the technology that it handles from the host system, and for operating the host system's SPI-4 bus at one of several speeds based on bandwidth requirements of the port adapter.
    Type: Application
    Filed: June 12, 2007
    Publication date: December 6, 2007
    Inventors: David Doak, Garry Epps, Guy Fedorkow, Mark Gustlin, Steven Holmes, Randall Johnson, Promode Nedungadi, Mohammed Tatar
  • Publication number: 20070195761
    Abstract: An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port.
    Type: Application
    Filed: March 1, 2006
    Publication date: August 23, 2007
    Inventors: Mohammed Tatar, Garry Epps, Oded Trainin, Eyal Oren, Cedrik Begin
  • Publication number: 20070195778
    Abstract: An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port.
    Type: Application
    Filed: March 6, 2006
    Publication date: August 23, 2007
    Inventors: Mohammed Tatar, Garry Epps, Oded Trainin, Eyal Oren, Cedrik Begin
  • Publication number: 20070195777
    Abstract: An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port.
    Type: Application
    Filed: March 6, 2006
    Publication date: August 23, 2007
    Inventors: Mohammed Tatar, Garry Epps, Oded Trainin, Eyal Oren, Cedrik Begin
  • Publication number: 20070195773
    Abstract: An architecture for a line card in a network routing device is provided. The line card architecture provides a bi-directional interface between the routing device and a network, both receiving packets from the network and transmitting the packets to the network through one or more connecting ports. In both the receive and transmit path, packets processing and routing in a multi-stage, parallel pipeline that can operate on several packets at the same time to determine each packet's routing destination is provided. Once a routing destination determination is made, the line card architecture provides for each received packet to be modified to contain new routing information and additional header data to facilitate packet transmission through the switching fabric. The line card architecture further provides for the use of bandwidth management techniques in order to buffer and enqueue each packet for transmission through the switching fabric to a corresponding destination port.
    Type: Application
    Filed: February 21, 2006
    Publication date: August 23, 2007
    Inventors: Mohammed Tatar, Garry Epps, Oded Trainin, Eyal Oren, Cedrik Begin
  • Publication number: 20070165638
    Abstract: A method of routing data over an Internet Protocol security (IPSec) network, the method comprising: receiving packets for transmission over the IPSec network, controlling the order of processing of the packets, determining whether each packet requires security features, feeding of the packets to a post-queue line interface module according to the order of processing the packets and allocating a sequence number to each packet in the order of feeding of packets to the post-queue line interface module. A packet requiring security features are provided with such features, which may be AH or ESP protocol, before it is transmitted over the Internet Protocol security network. As the queueing of the packet is done before the packet is provided with security features, the quality of service of the IPSec network is improved with the packets being received at the anti-replay window according to the order of the allocated sequence numbers.
    Type: Application
    Filed: January 13, 2006
    Publication date: July 19, 2007
    Inventors: Naader Hasani, Mohammed Tatar
  • Publication number: 20070041390
    Abstract: A scheduling method and system for a multi-level class hierarchy are disclosed. The hierarchy includes a root node linked to at least two groups. One of the groups has priority over the other of the groups and comprises at least one high priority queue and at least one low priority queue. The method includes receiving traffic at the root node, directing traffic received at the root node to one of the groups, and directing traffic received at the priority group to one of the high priority and low priority queues. Packets are accepted at the high priority queue or the low priority queue if a specified rate is not exceeded at the high and low priority queues and at least some packets are dropped at the low priority queue if the specified rate is exceeded at the high and low priority queues.
    Type: Application
    Filed: August 17, 2005
    Publication date: February 22, 2007
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Mohammed Tatar, Clarence Filsfils, John Bettink
  • Publication number: 20060277346
    Abstract: A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and the network interfaces; a control bus coupled to the host system for controlling and monitoring the port adapter; and interface logic that interfaces the SPI-4 bus and the control bus to the network interfaces. Methods are provided for selecting and using one of a small plurality of different packet formats for various networking technologies, so that the port adapter can hide details of the technology that it handles from the host system, and for operating the host system's SPI-4 bus at one of several speeds based on bandwidth requirements of the port adapter.
    Type: Application
    Filed: August 11, 2006
    Publication date: December 7, 2006
    Inventors: David Doak, Garry Epps, Guy Fedorkow, Mark Gustlin, Steven Holmes, Randall Johnson, Promode Nedungadi, John Prokopik, Mohammed Tatar, Michael Taylor
  • Publication number: 20060193256
    Abstract: A method and system for shaping traffic in a multi-level queuing hierarchy are disclosed. The hierarchy includes a high priority channel and a low priority channel, wherein traffic on the low priority channel is fragmented and interleaved with traffic from the high priority channel and traffic combined from the high priority and low priority channels has a maximum shape rate. The method includes linking a high priority token bucket to a low priority token bucket, transmitting data from the high priority channel, and decrementing the low priority token bucket by an amount corresponding to the data transmitted. Data is transmitted from the low priority channel only if the low priority bucket has available tokens.
    Type: Application
    Filed: February 28, 2005
    Publication date: August 31, 2006
    Applicant: CISCO TECHNOLOGY, INC.
    Inventors: Barry Burns, Brian Hiltscher, Mohammed Tatar, Tim Webster
  • Publication number: 20050149651
    Abstract: A port adapter for connecting zero or more network interfaces to a host system having a SPI-4 bus is disclosed. The port adapter comprises zero or more network interfaces; a SPI-4 bus coupled to a host system to provide a communication channel between the host and the network interfaces; a control bus coupled to the host system for controlling and monitoring the port adapter; and interface logic that interfaces the SPI-4 bus and the control bus to the network interfaces. Methods are provided for selecting and using one of a small plurality of different packet formats for various networking technologies, so that the port adapter can hide details of the technology that it handles from the host system, and for operating the host system's SPI-4 bus at one of several speeds based on bandwidth requirements of the port adapter.
    Type: Application
    Filed: October 6, 2003
    Publication date: July 7, 2005
    Inventors: David Doak, Garry Epps, Guy Fedorkow, Mark Gustlin, Steven Holmes, Randall Johnson, Promode Nedungadi, John Prokopik, Mohammed Tatar, Michael Taylor