Patents by Inventor Mohan Dattatreya

Mohan Dattatreya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9331853
    Abstract: The rate at which packets are provided to a cryptographic engine of a cryptographic system is adjusted using a feedback mechanism to increase the output of the cryptographic system. Data is classified and queued on a per class/flow basis and stored in input queues prior to being processed. A class based queue scheduler is implemented to select data from the input queues to be transmitted to the cryptographic engine. The cryptographic engine operates in processing cycles. At each cycle, an amount of data is transferred from the input queues to a cryptographic engine input queue. A cryptographic accelerator in the cryptographic engine processes the data on the cryptographic engine input queue during the cycle. The output rate of the cryptographic accelerator is measured during the cycle and this value is used as feedback to determine how much data should be passed to the cryptographic engine for a subsequent cycle.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: May 3, 2016
    Assignee: RPX Clearinghouse LLC
    Inventors: Mohan Dattatreya, Mohana Posam, Abha Jain, Ayfang Yang
  • Patent number: 8370622
    Abstract: The rate at which packets are provided to a cryptographic engine of a cryptographic system may be adjusted using a feedback mechanism to increase the output of the cryptographic system. Data is classified and queued on a per class/flow basis and stored in input queues prior to being processed by the cryptographic engine. A class based queue scheduler is implemented to select data from the input queues to be transmitted to the cryptographic engine. The cryptographic engine operates in processing cycles. At each cycle, an amount of data is transferred from the input queues to a cryptographic engine input queue. A cryptographic accelerator in the cryptographic engine processes the data on the cryptographic engine input queue during the cycle. The output rate of the cryptographic accelerator is measured during the cycle and this value is used as feedback to determine how much data should be passed to the cryptographic engine for a subsequent cycle.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: February 5, 2013
    Assignee: Rockstar Consortium US LP
    Inventors: Mohan Dattatreya, Mohana Posam, Abha Jain, Ayfang Yang
  • Patent number: 7411916
    Abstract: A method and an apparatus that reduce the burden on routers by removing the aggregation and physical Wide Area Network (WAN) interface functions from the router are provided. The aggregation and physical Wide Area Network interface transparently forwards traffic and routing information to and from the WAN without becoming a router. The disclosed forwarding technique and apparatus is applicable to IP protocol as well as other protocols. As provided, the routing device is connected to a forwarding device via the Local Area Network (LAN) and the IP Multiplexer forwards data packets to one or more physical WAN links.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: August 12, 2008
    Assignee: Nortel Networks Limited
    Inventors: Joshua Sakov, Mohan Dattatreya, Vasant Sahay