Patents by Inventor Mohan R. Paruchuri

Mohan R. Paruchuri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7152315
    Abstract: A method 10, 80, 81 for making multi-layer electronic circuit boards 77, 137, 139 having metallized apertures 18, 20, 34, 40, 104, 106, 120.
    Type: Grant
    Filed: April 17, 2004
    Date of Patent: December 26, 2006
    Assignee: Visteon Global Technologies, Inc.
    Inventor: Mohan R. Paruchuri
  • Patent number: 7111883
    Abstract: A center console for a motor vehicle comprising a stationary housing mounted within the vehicle. The housing includes an open center defined between opposing ends and has a console body mounted within the open center of the housing. The console body is rotatable about a longitudinal axis running through the console body and is mounted such that an operator may remove the body from the frame. Also, at least two longitudinal side walls of the rotating body are visible within the open center and the console body may be rotated such that alternate side walls may be positioned in an uppermost position with respect to the center console. Thus, a user may exchange the console body for another and access multiple sides of the console body, regardless of which is in the uppermost position.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: September 26, 2006
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Udit Patel, Sunil Palakodati, Mohan R. Paruchuri, Balaji Bharadwaj, Abha Tiwari
  • Patent number: 6998293
    Abstract: The present invention is generally directed towards a flip chip assembly. In particular a new bonding process for bonding an electronic component to the substrate is disclosed. The method comprises the steps of forming at least one solder pad on the electronic component and forming at least one bond pad on the substrate wherein the at least one bond pad has a top layer formed of a metal. Placing an underfill film on top of the at least one bond pad and heating the electronic component and the substrate. Moving the electronic component towards the substrate such that the at least one solder pad is aligned on top of the at least one bond pad and finally forming a bond between the at least one solder pad and the top layer of the at least one bond pad.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: February 14, 2006
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Achyuta Achari, Mohan R. Paruchuri, Raja-Sheker Bollampally
  • Patent number: 6852932
    Abstract: A multi-layer circuit board having apertures that are selectively and electrically isolated from electrically grounded member and further having selectively formed air bridges and/or crossover members which are structurally supported by a polymeric material. Each of the apertures selectively receives an electrically conductive material.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: February 8, 2005
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Achyuta Achari, Andrew Zachary Glovatsky, Robert Edward Belke, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Mohan R. Paruchuri, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Patent number: 6826829
    Abstract: A method for attaching an electronic die to a substrate is disclosed. Preferably, the method includes fixing the die to the substrate, interconnecting the electronic die to an at least one bonding pad on the substrate to form an electrical connection, coating the interconnects and the electronic die with an electrically insulating coating, and covering the electronic die with a low temperature melting metal. Thus, the method of the present invention improves the reliability of the electronic die.
    Type: Grant
    Filed: March 7, 2002
    Date of Patent: December 7, 2004
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Cuong Van Pham, Jay DeAvis Baker, Mohan R. Paruchuri, Prathap Amervai Reddy, Vivek Amir Jairazbhoy
  • Publication number: 20040108131
    Abstract: A method for making a multi-layer circuit board 116 having apertures 96, 98 which may be selectively and electrically isolated from electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 104 which are structurally supported by material 112. Each of the apertures 96, 98 selectively receives electrically conductive material 114.
    Type: Application
    Filed: August 28, 2003
    Publication date: June 10, 2004
    Inventors: Achyuta Achari, Andrew Zachary Glovatsky, Robert Edward Belke, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Mohan R. Paruchuri, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Patent number: 6739041
    Abstract: A method 10, 90 for making a multi-layer electronic circuit board 82, 168 including the steps of forming at least one protuberance 15, 100 upon an electrically conductive member 12, 92 and adding additional electrically conductive layers of material 34, 56, 58, 104, 114, 138, 140 to the member 12, 92 while selectively extending the protuberance 15, 100 within the layers 82, 168, thereby forming a circuit board 82, 168. A portion of the formed circuit board may be etched in order to selectively create air-bridges 86 or interconnection portions 164.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: May 25, 2004
    Assignee: Visteon Global Tech., Inc.
    Inventors: Bharat Z. Patel, Jay D. Baker, Mohan R. Paruchuri
  • Patent number: 6729023
    Abstract: A method for making a multi-layer circuit board 116 having apertures 96, 98 which may be selectively and electrically isolated from electrically grounded member 46 and further having selectively formed air bridges and/or crossover members 104 which are structurally supported by material 112. Each of the apertures 96, 98 selectively receives electrically conductive material 114.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: May 4, 2004
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Achyuta Achari, Andrew Zachary Glovatsky, Robert Edward Belke, Brenda Joyce Nation, Delin Li, Lakhi N. Goenka, Mohan R. Paruchuri, Robert Joseph Gordon, Thomas Bernd Krautheim
  • Patent number: 6673723
    Abstract: A method 10 for making a multi-layer circuit board 70 having at least one electrically conductive interconnection portion or “via” 72 which extends within the board 70 and at least one air-bridge 74. The method 10 includes the steps of forming protuberances 13 upon a core member 12, attaching pre-circuit assemblies 32, 34 to the core member 12, thereby forming the circuit board 70 while concomitantly and selectively extending at least one of the protuberances 13 within the formed circuit board 70.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: January 6, 2004
    Inventors: Bharat Z. Patel, Jay D. Baker, Lakhi N. Goenka, Michael Allen Howey, Mohan R. Paruchuri, Richard Keith McMillan
  • Patent number: 6658731
    Abstract: In conventional ETM circuit structures a pin connector in which the pin is etched from the ETM substrate and the mating cavity is etched from the ETM substrate to be mated. The connector utilizes the subtractive ETM structure processing to define any one of several pin-cavity configurations. The pin serves as an anchor with the metallurgical bonds with solder in the cavity that forms on the copper surfaces of the ETM circuit structure to give good mechanical strength to the connection. In particular four different configurations of interconnections are shown and described.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: December 9, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Lakhi Nandlal Goenka, Mohan R. Paruchuri, Thomas B Krautheim
  • Publication number: 20030183951
    Abstract: The present invention is generally directed towards a flip chip assembly. In particular a new bonding process for bonding an electronic component to the substrate is disclosed. The method comprises the steps of forming at least one solder pad on the electronic component and forming at least one bond pad on the substrate wherein the at least one bond pad has a top layer formed of a metal. Placing an underfill film on top of the at least one bond pad and heating the electronic component and the substrate. Moving the electronic component towards the substrate such that the at least one solder pad is aligned on top of the at least one bond pad and finally forming a bond between the at least one solder pad and the top layer of the at least one bond pad.
    Type: Application
    Filed: March 29, 2002
    Publication date: October 2, 2003
    Inventors: Achyuta Achari, Mohan R. Paruchuri, Raja-Sheker Bollampally
  • Publication number: 20030167630
    Abstract: A method for attaching an electronic die to a substrate is disclosed. Preferably, the method includes fixing the die to the substrate, interconnecting the electronic die to an at least one bonding pad on the substrate to form an electrical connection, coating the interconnects and the electronic die with an electrically insulating coating, and covering the electronic die with a low temperature melting metal. Thus, the method of the present invention improves the reliability of the electronic die.
    Type: Application
    Filed: March 7, 2002
    Publication date: September 11, 2003
    Inventors: Cuong Van Pham, Jay DeAvis Baker, Mohan R. Paruchuri, Prathap Amervai Reddy, Vivek Amir Jairazbhoy
  • Patent number: 6613239
    Abstract: A method 10 for making multi-layer electronic circuit boards having metallized apertures 34, 36 which may be selectively and electrically grounded or isolated from an electrical ground plane.
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: September 2, 2003
    Assignee: Visteon Global Tech., Inc.
    Inventors: Andrew Z. Glovatsky, Robert E. Belke, Delin Li, Lakhi N. Goenka, Mohan R. Paruchuri, Marc A. Straub, Richard K. McMillan, Ram S. Raghava, Thomas B. Krautheim, Michael A. Howey, Vivek A. Jairazbhoy
  • Patent number: 6611429
    Abstract: The present invention is generally directed grounding an electrical connection to a magnesium cross beam of a motor vehicle. In order to ensure proper grounding, the cross beam is provided with a copper connector. The connector defines a first aperture. An electric circuit is preferably traced on a plastic substrate, where the substrate defines a second aperture. The substrate is placed on top of the cross beam such that the first aperture and the second aperture are aligned with each other. An attaching means such as screws is inserted through the first aperture to the second aperture such that the substrate is attached to the cross beam. In order to prevent the movement of the substrate relative to the cross beam the second aperture is provided with a washer.
    Type: Grant
    Filed: November 21, 2001
    Date of Patent: August 26, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Daniel Kline, Hong Zhou, Karen Lee Chiles, Lawrence LeRoy Kneisel, Mohan R. Paruchuri, Puqiang Zhang
  • Patent number: 6601753
    Abstract: A method for attaching an electronic die to a substrate is disclosed. Preferably, the method includes depositing a pad of low temperature die attachment material within a die attachment area on the substrate, positioning the die over the pad of low temperature die attachment material, and compressing the die against the substrate to expel air trapped within the pad of low temperature die attachment material. Further, a bead of containment material is deposited onto the substrate to define the die attachment area. In this manner, the die attachment material is contained on the substrate. Thus, the method of the present invention improves the reliability of the electronic die.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: August 5, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Jay DeAvis Baker, Lawrence Leroy Kneisel, Mohan R. Paruchuri, Prathap Amervai Reddy, Vivek Amir Jairazbhoy
  • Patent number: 6601296
    Abstract: A method of making an article, such as an electrical connector includes an injection-molded plastic substrate and a pattern of injection-molded metal conductors supported on and mechanically interlocked with the substrate, wherein one of the substrate and the conductors is over-molded onto the other of the substrate and the conductors.
    Type: Grant
    Filed: July 6, 1999
    Date of Patent: August 5, 2003
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Daniel Phillip Dailey, Mohan R. Paruchuri, Prathap Amerwai Reddy
  • Publication number: 20030095383
    Abstract: The present invention is generally directed grounding an electrical connection to a magnesium cross beam of a motor vehicle. In order to ensure proper grounding, the cross beam is provided with a copper connector. The connector defines a first aperture. An electric circuit is preferably traced on a plastic substrate, where the substrate defines a second aperture. The substrate is placed on top of the cross beam such that the first aperture and the second aperture are aligned with each other. An attaching means such as screws is inserted through the first aperture to the second aperture such that the substrate is attached to the cross beam. In order to prevent the movement of the substrate relative to the cross beam the second aperture is provided with a washer.
    Type: Application
    Filed: November 21, 2001
    Publication date: May 22, 2003
    Inventors: Daniel Kline, Hong Zhou, Karen Lee Chiles, Lawrence LeRoy Kneisel, Mohan R. Paruchuri, Puqiang Zhang
  • Patent number: 6495053
    Abstract: A multi-layer electronic circuit board design 10 having selectively formed apertures or cavities 26, and which includes grooves or troughs 20, 22 which are effective to selectively entrap liquefied adhesive material, thereby substantially preventing the adhesive material from entering the apertures 26.
    Type: Grant
    Filed: August 30, 2000
    Date of Patent: December 17, 2002
    Assignee: Visteon Global Tech, Inc.
    Inventors: Lawrence Leroy Kneisel, Mohan R. Paruchuri, Vivek Amir Jalrazbhoy, Vladimir Stoica
  • Publication number: 20020170944
    Abstract: A method for attaching an electronic die to a substrate is disclosed. Preferably, the method includes depositing a pad of low temperature die attachment material within a die attachment area on the substrate, positioning the die over the pad of low temperature die attachment material, and compressing the die against the substrate to expel air trapped within the pad of low temperature die attachment material. Further, a bead of containment material is deposited onto the substrate to define the die attachment area. In this manner, the die attachment material is contained on the substrate. Thus, the method of the present invention improves the reliability of the electronic die.
    Type: Application
    Filed: May 17, 2001
    Publication date: November 21, 2002
    Inventors: Jay DeAvis Baker, Lawrence Leroy Kneisel, Mohan R. Paruchuri, Prathap Amervai Reddy, Vivek Amir Jairazbhoy
  • Patent number: 6475703
    Abstract: A multilayer circuit board having air bridge crossover structures and an additive method for producing the same, wherein the circuit includes specially designed metallic fortifying layers to mechanically and/or electrically fortify the circuit.
    Type: Grant
    Filed: December 1, 1998
    Date of Patent: November 5, 2002
    Assignee: Visteon Global Technologies, Inc.
    Inventors: Delin Li, Achyuta Achari, Alice Dawn Zitzmann, Robert Edward Belke, Jr., Brenda Joyce Nation, Edward McLeskey, Mohan R. Paruchuri, Lakhi Nandlal Goenka