Patents by Inventor Mohd Vaseem

Mohd Vaseem has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for rule-based automatic layout parasitic extraction in a multi-technology environment
    Patent number: 8650518
    Abstract: A system for extracting a layout from an object in a fabric includes means for providing fabric data to a rule-based layout extraction engine; means for maintaining a layout extraction rule to select a layout object from the fabric data; means for maintaining a binding rule to bind the layout object to a solver; means for maintaining a boundary rule to specify a boundary condition for a solver; and means for executing the solver on the layout object to generate a model of the object.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: February 11, 2014
    Assignee: Cadence Design Systems, Inc.
    Inventors: Utpal Bhattacharya, Sanjay Gupta, Tarun Beri, Mohd Vaseem
  • METHOD AND APPARATUS FOR RULE-BASED AUTOMATIC LAYOUT PARASITIC EXTRACTION IN A MULTI-TECHNOLOGY ENVIRONMENT
    Publication number: 20110173582
    Abstract: A system for extracting a layout from an object in a fabric includes means for providing fabric data to a rule-based layout extraction engine; means for maintaining a layout extraction rule to select a layout object from the fabric data; means for maintaining a binding rule to bind the layout object to a solver; means for maintaining a boundary rule to specify a boundary condition for a solver; and means for executing the solver on the layout object to generate a model of the object.
    Type: Application
    Filed: January 8, 2010
    Publication date: July 14, 2011
    Applicant: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Utpal Bhattacharya, Sanjay Gupta, Tarun Beri, Mohd Vaseem