Patents by Inventor Mohit Bhatia
Mohit Bhatia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250084378Abstract: Methods for production of nonhuman mammalian cultured meat fit for human consumption involving co-culturing cells isolated from nonhuman mammalian umbilical cord and/or placenta and/or components thereof with extracellular matrix (ECM) derived from nonhuman mammalian placentas and products produced by these methods are provided.Type: ApplicationFiled: December 20, 2022Publication date: March 13, 2025Inventors: Maghsoud DARIANI, Mohit BHATIA
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Publication number: 20250006695Abstract: Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first layer with a first die having a first contact; a second die having a second contact; and a pad layer, on the first and second dies, including a first pad and a second pad, where the first pad is coupled to and offset from the first contact in a first direction, and the second pad is coupled to and is offset from the second contact in a second direction different than the first direction; and a second layer including a third die having third and fourth contacts, where the first layer is coupled to the second layer by metal-to-metal bonds and fusion bonds, the first contact is coupled to the third contact by the first pad, and the second contact is coupled to the fourth contact by the second pad.Type: ApplicationFiled: June 29, 2023Publication date: January 2, 2025Applicant: Intel CorporationInventors: Bhaskar Jyoti Krishnatreya, Adel A. Elsherbini, Brandon M. Rawlings, Kimin Jun, Omkar G. Karhade, Mohit Bhatia, Nitin A. Deshpande, Prashant Majhi, Johanna M. Swan
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Publication number: 20250006651Abstract: An apparatus comprising a first integrated circuit device, the first integrated circuit device comprising a fiducial having a length size greater than a width size of the fiducial, wherein the fiducial comprises at least one first area and at least one second area, wherein the at least one first area is to stop light from a light source and the at least one second area is to pass light from the light source during a determination of an alignment between the first integrated circuit device and a second integrated circuit device.Type: ApplicationFiled: June 30, 2023Publication date: January 2, 2025Inventors: Omkar G. Karhade, Nitin A. Deshpande, Francisco Maya, Khant Minn, Suresh V. Pothukuchi, Arnab Sarkar, Mohit Bhatia, Bhaskar Jyoti Krishnatreya, Siyan Dong
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Publication number: 20250006678Abstract: Disclosed herein are microelectronic assemblies, related apparatuses, and methods. In some embodiments, a microelectronic assembly may include a first die in a first layer; and a second and third die in a second layer, the second layer coupled to the first layer by hybrid bond interconnects having a first pad and a second pad, wherein the first pad is coupled to a first via in the second die and the first pad is offset from the first via by a first dimension, and the second pad is coupled to a second via in the third die and the second pad is offset from the second via by a second dimension different than the first dimension. In some embodiments, the first pad is offset from the first via in a first direction and the second pad is offset from the second via in a second direction different than the first direction.Type: ApplicationFiled: June 30, 2023Publication date: January 2, 2025Applicant: Intel CorporationInventors: Omkar G. Karhade, Harini Kilambi, Kimin Jun, Adel A. Elsherbini, John Edward Zeug Matthiesen, Trianggono Widodo, Adita Das, Mohit Bhatia, Dimitrios Antartis, Bhaskar Jyoti Krishnatreya, Rajesh Surapaneni, Xavier Francois Brun
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Patent number: 11887962Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: GrantFiled: June 16, 2020Date of Patent: January 30, 2024Assignee: Intel CorporationInventors: Omkar G. Karhade, Nitin A. Deshpande, Mohit Bhatia, Sairam Agraharam, Edvin Cetegen, Anurag Tripathi, Malavarayan Sankarasubramanian, Jan Krajniak, Manish Dubey, Jinhe Liu, Wei Li, Jingyi Huang
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Publication number: 20240006358Abstract: Bonding pedestals on substrates, and their manufacture, for direct bonding integrated circuit (IC) dies onto substrates. The electrical interconnections of one or more IC dies and a substrate are bonded together with the IC dies on and overhanging the pedestals. A bonding pedestal may be formed by etching down the substrate around the interconnections. A system may include one or more such pedestals above and adjacent a recessed surface on a substrate with IC dies overhanging the pedestals. Such a system may be coupled to a host component, such as a board, and a power supply via the host component.Type: ApplicationFiled: June 30, 2022Publication date: January 4, 2024Applicant: Intel CorporationInventors: Zhihua Zou, Omkar Karhade, Botao Zhang, Julia Chiu, Vivek Chidambaram, Yi Shi, Mohit Bhatia, Mostafa Aghazadeh
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Publication number: 20230420376Abstract: Disclosed herein are microelectronic structures including bridges, and related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate with first and second metal layers; a cavity in the substrate, where a portion of the first and second metal layers, are exposed with the portion of the first metal layer partially overlapping the portion of the second metal layer; and a bridge component in the cavity, having a first conductive contact at a first face and a second conductive contact at a second face opposing the first face, the second face towards a bottom surface of the cavity, the portion of the first metal layer is between the second face of the bridge component and the portion of the second metal layer, and the second conductive contact is electrically coupled to the portion of the second metal layer in the cavity.Type: ApplicationFiled: September 7, 2023Publication date: December 28, 2023Applicant: Intel CorporationInventors: Omkar G. Karhade, Nitin A. Deshpande, Mohit Bhatia, Debendra Mallik
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Patent number: 11804441Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate including a first metal layer and a second metal layer; a cavity in the substrate, wherein a portion of the first metal layer in the substrate and a portion of the second metal layer in the substrate are exposed in the cavity; and a bridge component in the cavity, the bridge component includes a first conductive contact at a first face and a second conductive contacts at an opposing second face, wherein the second face of the bridge component is between the first face of the bridge component and a bottom surface of the cavity in the substrate, and wherein the second conductive contact is electrically coupled to the portion of the first metal layer in the cavity.Type: GrantFiled: June 16, 2020Date of Patent: October 31, 2023Assignee: Intel CorporationInventors: Omkar G. Karhade, Nitin A. Deshpande, Mohit Bhatia, Debendra Mallik
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Patent number: 11791274Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: GrantFiled: June 16, 2020Date of Patent: October 17, 2023Assignee: Intel CorporationInventors: Manish Dubey, Omkar G. Karhade, Nitin A. Deshpande, Jinhe Liu, Sairam Agraharam, Mohit Bhatia, Edvin Cetegen
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Publication number: 20230299049Abstract: A microelectronic component and a method of forming same. The microelectronic component includes: a first substrate having first through vias therein, the first substrate including silicon or glass; a first layer on a front surface of the first substrate and including one or more first dies coupled to the first through vias; a second substrate on a front surface of first layer and having second through vias therein and including silicon or glass; a second layer on a front surface of the second substrate, the first layer between the first substrate and the second substrate, the second layer including one or more second dies coupled to the second through vias; and electrically conductive structures on a back surface of the first substrate coupled to the first through vias.Type: ApplicationFiled: March 18, 2022Publication date: September 21, 2023Applicant: Intel CorporationInventors: Nitin A. Deshpande, Omkar G. Karhade, Mohit Bhatia, Debendra Mallik
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Patent number: 11735558Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: GrantFiled: May 10, 2022Date of Patent: August 22, 2023Assignee: Intel CorporationInventors: Omkar G. Karhade, Nitin A. Deshpande, Mohit Bhatia, Anurag Tripathi, Takeshi Nakazawa, Steve Cho
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Patent number: 11521931Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: GrantFiled: June 16, 2020Date of Patent: December 6, 2022Assignee: Intel CorporationInventors: Jason M. Gamba, Nitin A. Deshpande, Mohit Bhatia, Omkar G. Karhade, Bai Nie, Gang Duan, Kristof Kuwawi Darmawikarta, Wei-Lun Jen
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Publication number: 20220270998Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: ApplicationFiled: May 10, 2022Publication date: August 25, 2022Applicant: Intel CorporationInventors: Omkar G. Karhade, Nitin A. Deshpande, Mohit Bhatia, Anurag Tripathi, Takeshi Nakazawa, Steve Cho
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Patent number: 11373972Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: GrantFiled: June 16, 2020Date of Patent: June 28, 2022Assignee: Intel CorporationInventors: Omkar G. Karhade, Nitin A. Deshpande, Mohit Bhatia, Anurag Tripathi, Takeshi Nakazawa, Steve Cho
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Publication number: 20210391266Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: ApplicationFiled: June 16, 2020Publication date: December 16, 2021Applicant: Intel CorporationInventors: Jason M. Gamba, Nitin A. Deshpande, Mohit Bhatia, Omkar G. Karhade, Bai Nie, Gang Duan, Kristof Kuwawi Darmawikarta, Wei-Lun Jen
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Publication number: 20210391294Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: ApplicationFiled: June 16, 2020Publication date: December 16, 2021Applicant: Intel CorporationInventors: Omkar G. Karhade, Nitin A. Deshpande, Mohit Bhatia, Anurag Tripathi, Takeshi Nakazawa, Steve Cho
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Publication number: 20210391268Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: ApplicationFiled: June 16, 2020Publication date: December 16, 2021Applicant: Intel CorporationInventors: Omkar G. Karhade, Nitin A. Deshpande, Mohit Bhatia, Debendra Mallik
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Publication number: 20210391273Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: ApplicationFiled: June 16, 2020Publication date: December 16, 2021Applicant: Interl CorporationInventors: Manish Dubey, Omkar G. Karhade, Nitin A. Deshpande, Jinhe Liu, Sairam Agraharam, Mohit Bhatia, Edvin Cetegen
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Publication number: 20210391295Abstract: Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.Type: ApplicationFiled: June 16, 2020Publication date: December 16, 2021Applicant: Intel CorporationInventors: Omkar G. Karhade, Nitin A. Deshpande, Mohit Bhatia, Sairam Agraharam, Edvin Cetegen, Anurag Tripathi, Malavarayan Sankarasubramanian, Jan Krajniak, Manish Dubey, Jinhe Liu, Wei Li, Jingyi Huang
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Publication number: 20210275834Abstract: One embodiment is directed to a non-contact, medical ultrasound therapy system for generating and controlling low frequency ultrasound for the delivery of fluids containing biologic or cellular materials. The ultrasound therapy system includes a treatment wand including an ultrasonic transducer, a generator unit, and a cable coupling the treatment wand to the generator unit. The generator unit generates electric power output to drive the ultrasonic transducer and includes a digital frequency generator.Type: ApplicationFiled: July 28, 2017Publication date: September 9, 2021Applicant: ALLIQUA BIOMEDICAL, INC.Inventors: Douglas J. DUCHON, Mohit BHATIA, Janice M. SMIELL, Ryan Glen TETZLOFF