Patents by Inventor Mohit Prasad

Mohit Prasad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10467154
    Abstract: Systems, methods, and apparatus for communication virtualized general-purpose input/output signals over a serial communication link A method performed at a transmitting device coupled to a communication link includes configuring general-purpose input/output (GPIO) state from a plurality of sources into a virtual general-purpose input/output word, identifying one or more destinations for the first GPIO word based on a mapping of the GPIO state to one or more devices coupled to a serial bus, and transmitting the first GPIO word to each destination.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: November 5, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Lalan Jee Mishra, Richard Dominic Wietfeldt, Christopher Kong Yee Chun, Mohit Prasad, Chris Rosolowski
  • Patent number: 10303643
    Abstract: A multi-modulation scheme is provided that combines pulse-width modulation and phase modulation to transmit a plurality of GPIO signals as virtual GPIO signals.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: May 28, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Lalan Jee Mishra, Richard Wietfeldt, Mohit Prasad, James Panian
  • Publication number: 20190087380
    Abstract: A multi-modulation scheme is provided that combines pulse-width modulation and phase modulation to transmit a plurality of GPIO signals as virtual GPIO signals.
    Type: Application
    Filed: October 19, 2018
    Publication date: March 21, 2019
    Inventors: Lalan Jee Mishra, Richard Wietfeldt, Mohit Prasad, James Panian
  • Patent number: 10146727
    Abstract: A multi-modulation scheme is provided that combines pulse-width modulation and phase modulation to transmit a plurality of GPIO signals as virtual GPIO signals.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: December 4, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Lalan Jee Mishra, Richard Wietfeldt, Mohit Prasad, James Panian
  • Publication number: 20180232324
    Abstract: Systems, methods, and apparatus for communication virtualized general-purpose input/output signals over a serial communication link A method performed at a transmitting device coupled to a communication link includes configuring general-purpose input/output (GPIO) state from a plurality of sources into a virtual general-purpose input/output word, identifying one or more destinations for the first GPIO word based on a mapping of the GPIO state to one or more devices coupled to a serial bus, and transmitting the first GPIO word to each destination.
    Type: Application
    Filed: January 8, 2018
    Publication date: August 16, 2018
    Inventors: Lalan Jee Mishra, Richard Dominic Wietfeldt, Christopher Kong Yee Chun, Mohit Prasad, Chris Rosolowski
  • Patent number: 9582456
    Abstract: A finite state machine is provided that both serializes virtual GPIO signals and deserializes virtual GPIO signals. The finite state machine frames the serialized virtual GPIO signals into frames each demarcated by a start bit and an end bit.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: February 28, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Lalan Mishra, Mohit Prasad
  • Publication number: 20160306770
    Abstract: A multi-modulation scheme is provided that combines pulse-width modulation and phase modulation to transmit a plurality of GPIO signals as virtual GPIO signals.
    Type: Application
    Filed: April 12, 2016
    Publication date: October 20, 2016
    Inventors: Lalan Jee Mishra, Richard Wietfeldt, Mohit Prasad, James Panian
  • Publication number: 20150356053
    Abstract: A finite state machine is provided that both serializes virtual GPIO signals and deserializes virtual GPIO signals. The finite state machine frames the serialized virtual GPIO signals into frames each demarcated by a start bit and an end bit.
    Type: Application
    Filed: August 13, 2015
    Publication date: December 10, 2015
    Inventors: Lalan Mishra, Mohit Prasad
  • Patent number: 9129072
    Abstract: A finite state machine is provided that both serializes virtual GPIO signals and deserializes virtual GPIO signals responsive to cycles of an external clock. The finite state machine frames the serialized virtual GPIO signals into frames each demarcated by a start bit and an end bit.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: September 8, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Lalan Mishra, Mohit Prasad
  • Publication number: 20140108679
    Abstract: A finite state machine is provided that both serializes virtual GPIO signals and deserializes virtual GPIO signals responsive to cycles of an external clock. The finite state machine frames the serialized virtual GPIO signals into frames each demarcated by a start bit and an end bit.
    Type: Application
    Filed: January 25, 2013
    Publication date: April 17, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Lalan Mishra, Mohit Prasad
  • Publication number: 20070201586
    Abstract: A method and system for decoding a data symbol sequence that has been previously encoded using one or more unique code word polynomials in which at least one unique code word polynomial is used more than once. A set of 2d-1 unique branch metrics is computed, using the unique code word polynomials, where d is the number of unique code word polynomials. The computed set of 2d-1 unique branch metrics is stored in a memory. Path metrics are then calculated, based on the stored set of 2d-1 unique branch metrics. A decoded data symbol sequence is generated based on the computed path metrics.
    Type: Application
    Filed: May 2, 2007
    Publication date: August 30, 2007
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Mohit Prasad, Gaurav Davra, Arnab Mitra, Amrit Singh, Nitin Vig
  • Publication number: 20060168502
    Abstract: A Maximum Likelihood Sequence Estimation (MLSE) decoder that decodes an encoded sequence of data symbols includes a branch metric unit for computing branch metrics for each trellis stage of the encoded sequence, a path metric unit for computing a path metric for each trellis stage using the computed branch metrics, and an M-at-a-time traceback unit for performing an M-at-a-time traceback operation using the computed path metrics. The M-at-a-time traceback operation generates M decoded data symbols in a single M-at-a-time traceback operation.
    Type: Application
    Filed: January 21, 2005
    Publication date: July 27, 2006
    Inventors: Mohit Prasad, Nitin Vig, Arnab Mitra, Amrit Singh, Gaurav Davra
  • Publication number: 20060020875
    Abstract: A method and system for decoding a data symbol sequence that has been previously encoded using one or more unique code word polynomials in which at least one unique code word polynomial is used more than once. A set of 2d-1 unique branch metrics is computed, using the unique code word polynomials, where d is the number of unique code word polynomials. The computed set of 2d-1 unique branch metrics is stored in a memory. Path metrics are then calculated, based on the stored set of 2d-1 unique branch metrics. A decoded data symbol sequence is generated based on the computed path metrics.
    Type: Application
    Filed: July 21, 2004
    Publication date: January 26, 2006
    Inventors: Mohit Prasad, Gaurav Davra, Arnab Mitra, Amrit Singh, Nitin Vig