Patents by Inventor Mohit Prasad
Mohit Prasad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11972312Abstract: Disclosed herein are system, method, and computer program product embodiments for synchronizing data in a source system to an application without relying on middleware. An embodiment operates by performing an initial load of records for an object for an application from a source system, thereby retrieving a first set of records. The embodiment first maps the first set of records to the object using a transform template. The embodiment creates the object in the application using the first set of records based on the first mapping. The embodiment performs a delta load of records for the object from the source system, thereby retrieving a second set of records. The embodiment second maps the second set of records to the object using the transform template. The embodiment then updates the object using the second set of records based on the second mapping.Type: GrantFiled: June 7, 2022Date of Patent: April 30, 2024Assignee: SAP SEInventors: Mohit V Gadkari, Anirudh Prasad, Pankaj Kumar Agrawal, Yatish Nagaraja, Kopal Jauhari, Namrata, Jovin Jijo
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Publication number: 20240104424Abstract: The present disclosure involves systems, software, and computer implemented methods for an artificial intelligence work center for ERP data. One example method includes receiving scenario and model settings for an artificial intelligence model for a predictive scenario. A copy of the dataset is processed based on settings to generate a prepared dataset that is provided with the settings to a predictive analytical library. A trained model trained and evaluation data for the trained model is received from the predictive analytical library. A request is received to generate a prediction for the predictive scenario for a target field for a record of the dataset. The record of the dataset is provided to the trained model and a prediction for the target field for the record the dataset is received from the model. The prediction is included for presentation in a user interface that displays information from the dataset.Type: ApplicationFiled: September 23, 2022Publication date: March 28, 2024Inventors: Mohit V. Gadkari, Ankur Malik, Sunil S. Parvatikar, Simona Marincei, Dalibor Knis, Anirudh Prasad, Kopal Jauhari, Saurabh Saxena, Yatish Nagaraja, Pankaj Kumar Agrawal, Long Qian, Varun Verma
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Patent number: 10467154Abstract: Systems, methods, and apparatus for communication virtualized general-purpose input/output signals over a serial communication link A method performed at a transmitting device coupled to a communication link includes configuring general-purpose input/output (GPIO) state from a plurality of sources into a virtual general-purpose input/output word, identifying one or more destinations for the first GPIO word based on a mapping of the GPIO state to one or more devices coupled to a serial bus, and transmitting the first GPIO word to each destination.Type: GrantFiled: January 8, 2018Date of Patent: November 5, 2019Assignee: QUALCOMM IncorporatedInventors: Lalan Jee Mishra, Richard Dominic Wietfeldt, Christopher Kong Yee Chun, Mohit Prasad, Chris Rosolowski
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Patent number: 10303643Abstract: A multi-modulation scheme is provided that combines pulse-width modulation and phase modulation to transmit a plurality of GPIO signals as virtual GPIO signals.Type: GrantFiled: October 19, 2018Date of Patent: May 28, 2019Assignee: QUALCOMM IncorporatedInventors: Lalan Jee Mishra, Richard Wietfeldt, Mohit Prasad, James Panian
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Publication number: 20190087380Abstract: A multi-modulation scheme is provided that combines pulse-width modulation and phase modulation to transmit a plurality of GPIO signals as virtual GPIO signals.Type: ApplicationFiled: October 19, 2018Publication date: March 21, 2019Inventors: Lalan Jee Mishra, Richard Wietfeldt, Mohit Prasad, James Panian
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Patent number: 10146727Abstract: A multi-modulation scheme is provided that combines pulse-width modulation and phase modulation to transmit a plurality of GPIO signals as virtual GPIO signals.Type: GrantFiled: April 12, 2016Date of Patent: December 4, 2018Assignee: QUALCOMM IncorporatedInventors: Lalan Jee Mishra, Richard Wietfeldt, Mohit Prasad, James Panian
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Publication number: 20180232324Abstract: Systems, methods, and apparatus for communication virtualized general-purpose input/output signals over a serial communication link A method performed at a transmitting device coupled to a communication link includes configuring general-purpose input/output (GPIO) state from a plurality of sources into a virtual general-purpose input/output word, identifying one or more destinations for the first GPIO word based on a mapping of the GPIO state to one or more devices coupled to a serial bus, and transmitting the first GPIO word to each destination.Type: ApplicationFiled: January 8, 2018Publication date: August 16, 2018Inventors: Lalan Jee Mishra, Richard Dominic Wietfeldt, Christopher Kong Yee Chun, Mohit Prasad, Chris Rosolowski
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Patent number: 9582456Abstract: A finite state machine is provided that both serializes virtual GPIO signals and deserializes virtual GPIO signals. The finite state machine frames the serialized virtual GPIO signals into frames each demarcated by a start bit and an end bit.Type: GrantFiled: August 13, 2015Date of Patent: February 28, 2017Assignee: QUALCOMM IncorporatedInventors: Lalan Mishra, Mohit Prasad
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Publication number: 20160306770Abstract: A multi-modulation scheme is provided that combines pulse-width modulation and phase modulation to transmit a plurality of GPIO signals as virtual GPIO signals.Type: ApplicationFiled: April 12, 2016Publication date: October 20, 2016Inventors: Lalan Jee Mishra, Richard Wietfeldt, Mohit Prasad, James Panian
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Publication number: 20150356053Abstract: A finite state machine is provided that both serializes virtual GPIO signals and deserializes virtual GPIO signals. The finite state machine frames the serialized virtual GPIO signals into frames each demarcated by a start bit and an end bit.Type: ApplicationFiled: August 13, 2015Publication date: December 10, 2015Inventors: Lalan Mishra, Mohit Prasad
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Patent number: 9129072Abstract: A finite state machine is provided that both serializes virtual GPIO signals and deserializes virtual GPIO signals responsive to cycles of an external clock. The finite state machine frames the serialized virtual GPIO signals into frames each demarcated by a start bit and an end bit.Type: GrantFiled: January 25, 2013Date of Patent: September 8, 2015Assignee: QUALCOMM IncorporatedInventors: Lalan Mishra, Mohit Prasad
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Publication number: 20140108679Abstract: A finite state machine is provided that both serializes virtual GPIO signals and deserializes virtual GPIO signals responsive to cycles of an external clock. The finite state machine frames the serialized virtual GPIO signals into frames each demarcated by a start bit and an end bit.Type: ApplicationFiled: January 25, 2013Publication date: April 17, 2014Applicant: QUALCOMM IncorporatedInventors: Lalan Mishra, Mohit Prasad
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Publication number: 20070201586Abstract: A method and system for decoding a data symbol sequence that has been previously encoded using one or more unique code word polynomials in which at least one unique code word polynomial is used more than once. A set of 2d-1 unique branch metrics is computed, using the unique code word polynomials, where d is the number of unique code word polynomials. The computed set of 2d-1 unique branch metrics is stored in a memory. Path metrics are then calculated, based on the stored set of 2d-1 unique branch metrics. A decoded data symbol sequence is generated based on the computed path metrics.Type: ApplicationFiled: May 2, 2007Publication date: August 30, 2007Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Mohit Prasad, Gaurav Davra, Arnab Mitra, Amrit Singh, Nitin Vig
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Publication number: 20060168502Abstract: A Maximum Likelihood Sequence Estimation (MLSE) decoder that decodes an encoded sequence of data symbols includes a branch metric unit for computing branch metrics for each trellis stage of the encoded sequence, a path metric unit for computing a path metric for each trellis stage using the computed branch metrics, and an M-at-a-time traceback unit for performing an M-at-a-time traceback operation using the computed path metrics. The M-at-a-time traceback operation generates M decoded data symbols in a single M-at-a-time traceback operation.Type: ApplicationFiled: January 21, 2005Publication date: July 27, 2006Inventors: Mohit Prasad, Nitin Vig, Arnab Mitra, Amrit Singh, Gaurav Davra
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Publication number: 20060020875Abstract: A method and system for decoding a data symbol sequence that has been previously encoded using one or more unique code word polynomials in which at least one unique code word polynomial is used more than once. A set of 2d-1 unique branch metrics is computed, using the unique code word polynomials, where d is the number of unique code word polynomials. The computed set of 2d-1 unique branch metrics is stored in a memory. Path metrics are then calculated, based on the stored set of 2d-1 unique branch metrics. A decoded data symbol sequence is generated based on the computed path metrics.Type: ApplicationFiled: July 21, 2004Publication date: January 26, 2006Inventors: Mohit Prasad, Gaurav Davra, Arnab Mitra, Amrit Singh, Nitin Vig