Abstract: A system, apparatus, method and article to perform radial fall-off correction are described. The apparatus may include a coefficient determination module and a fall-off correction module. The coefficient determination module determines a fall-off correction coefficient for a pixel of an image sensor, and the fall-off correction module corrects the pixel based on an intensity value of the pixel and the fall-off correction coefficient. The fall-off correction coefficient may be based on one or more stored coefficient values, where the one or more coefficient values correspond to a squared distance between the pixel and a center position of the image sensor. In this manner, improvements in computational efficiency and reductions in implementation complexity are attained. Other embodiments may be described and claimed.

Abstract: A graphics system includes a single buffer coupled between a graphics controller and a display controller. The graphics controller rotates a frame generated by an application and writes the rotated frame into the buffer. The rotation is performed a segment (e.g., a quartile of a frame) at a time. Each time the display controller completes displaying a frame quartile, the display controller signals the graphics controller to rotate a corresponding quartile of a next frame. The reduction in buffer space reduces power consumption and improves performance of the system.

Abstract: A method and apparatus to perform memory management are described.

Abstract: A dynamic cache-locking algorithm may determine the most frequently used function(s) and the number of cache lines that should be locked into the instruction cache embedded into a processor. By evaluating the dynamic cache-locking algorithm, a determination may be made to lock an optimal amount of functions that correspond to a given, limited amount of instruction cache.

Abstract: A network is disclosed. The network includes a server computer, a first wireless communications link communicatively coupled to the server computer, a second wireless communications link communicatively coupled to the server computer, and a handheld device communicatively coupled to the first and second wireless communications links. The handheld device concurrently receives an object from the server computer via the first and second wireless communications links.

Abstract: Methods and apparatus for calculating Single-Instruction-Multiple-Data (SIMD) complex arithmetic. A coprocessor instruction has a format identifying a multiply and subtract instruction to generate real components for complex multiplication of first operand complex data and corresponding second operand complex data, a cross multiply and add instruction to generate imaginary components for complex multiplication of the first operand complex data and the corresponding second operand complex data, an add-subtract instruction to add real components of the first operand to imaginary components of the second operand and to subtract real components of the second operand from imaginary components of the first operand, and a subtract-add instruction to subtract the real components of the second operand from the imaginary components of the first operand and to add the real components of the first operand to the imaginary components of the second operand.

Abstract: Trusted code may be patched in a manner that resists tampering from non-trusted sources. In some embodiments, the patches may be moved into a patch cache in a trusted processing module for execution.

Abstract: A method and apparatus to perform memory management are described.

Abstract: Transfer functions are often used for image processing. Look-up tables can be used to implement transfer functions in a processor-efficient manner. In one embodiment, the invention is an apparatus that includes a look-up table (LUT) storing sample outputs from an output range of a transfer function, the sample outputs corresponding to sample inputs from an input range of the transfer function, the sample inputs being distributed so that more sample inputs are associated with a first region of the transfer function than a second region of the transfer function; and an address module to calculate an index into the LUT based on image data. In one embodiment, the apparatus uses the LUT to process the image data.

Abstract: A technique to manage multiple-mapped memory and to selectively execute at least a portion of a process from either an unprotected function or a protected function. The process contains memory that is multiple-mapped to both an unprotected memory region and to a protected memory region that stores a protected function. A trust co-processor determines whether the process is a trusted process or an untrusted process. If trusted, the multiple-mapped memory is mapped to the protected memory region; and a transfer agent operates to control the process and to call the protected function using parameters provided to the transfer agent from the process. In one embodiment, the transfer agent resides in nonvolatile memory, and is transferred to internal SRAM to control execution of a trusted process.

Abstract: An apparatus includes a processor to control a boot-up of an electronic device in response to a detection of tampering with the device. In some embodiments of the invention, the processor may detect tampering by authenticating a source of a boot image used during the boot-up; and the processor may detect tampering by verifying the integrity of the boot image. In some embodiments of the invention, the processor may control a transition of the electronic device from a first state to a second power state in response to a detection of tampering with the device. The electronic device consumes more power in the second power state than in the first power state.

Abstract: In an embodiment, an apparatus includes a cryptographic processor within a wireless device. The cryptographic processor includes at least one cryptographic unit. The cryptographic processor also includes a nonvolatile memory to store one or more microcode instructions, wherein at least one of the one or more microcode instructions is related to a sensitive operation. The cryptographic processor also includes a controller to control execution of the one or more microcode instructions by the at least one cryptographic unit, wherein the controller is to preclude execution of the sensitive operation if the apparatus is within an untrusted state.

Abstract: In an embodiment, an apparatus includes one or more cryptographic units. The apparatus also includes a memory to store one or more data encryption keys and an associated header for the one or more data encryption keys. The associated header defines which of the one or more cryptographic units are to use the data encryption key.

Abstract: During debug operations in one embodiment of a trusted subsystem, passwords may be used to enable and disable access to selected areas, and to make access by different entities mutually exclusive. In another embodiment, programmable units may be used to define what the selected areas of access are for debug operations.