Abstract: There is shown and described a memory array using MNOS/MOS transistors. The memory devices are nonvolatile, metal-nitride-oxide-semiconductor (MNOS) variable threshold voltage transistors and the metal-oxide semiconductor (MOS) input-output devices exhibit fixed threshold voltages. The MOS devices are fabricated first and the MNOS memory devices are fabricated thereafter. This memory gate last (MGL) arrangement eliminates the need for high temperature process steps after the formation of the MNOS device gate dielectric in the array devices. This operation results in an MNOS/MOS memory array which exhibits excellent ionizing radiation hardness characteristics as well as memory properties which are improved over present radiation hardened MNOS/MOS arrays.

Abstract: A process for the direct thermal nitridation of silicon semiconductor devices in which the semiconductor body is placed in an atmosphere of N.sub.2, at a temperature of less than 1000.degree. C. The N.sub.2 is activated by an RF electrical field which ionizes the nitrogen, which then combines with the silicon surface.