Patents by Inventor Mon Y. Tsai

Mon Y. Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4680539
    Abstract: A linear feedback shift register for inclusion in a VLSI circuit. During a test function for the VLSI circuit, the shift register can be programmed into an LSSD test mode, or two generate test patterns for the VLSI circuit, and to perform a corresponding signature analysis on hashing functions on the VLSI response to the test pattern. The linear feedback shift register can be programmed on the VLSI chip to perform any of these test functions. During normal VLSI circuit operation, the shift register is transparent to logic signals carried by the VLSI circuit.
    Type: Grant
    Filed: December 30, 1983
    Date of Patent: July 14, 1987
    Assignee: International Business Machines Corp.
    Inventor: Mon Y. Tsai