Abstract: A neuromorphic circuit suitable for implementing a neural network includes word lines, pairs of complementary bit-lines, source lines, a set of elementary cells, and an electronic circuit implementing a neurone having an output. The electronic circuit includes a set of logic components, a counting unit, and a comparison unit having a comparator and a comparison voltage generator, the comparator being configured to compare the output of the counting unit with the comparison voltage generated by the comparison voltage generator in order to output a signal dependent on the comparison and corresponding to the output of the electronic circuit.

Abstract: A data storage circuit of NOR type includes a three-dimensional memory structure, produced on a first semiconductor substrate, and comprising a plurality of memory planes, each plane forming a two-dimensional array of memory cells. Each memory cell has a selection node, a first input/output node and a second input/output node. The three-dimensional memory structure has an upper surface comprising a plurality of connectors distributed over the surface; each connector is connected to at least one among the first or second input/output nodes of a given column; a control circuit produced on a second semiconductor substrate; an interconnection structure comprising: a plurality of bonding pads placed between the control circuit and the upper surface; the plurality of bonding pads forms a periodic repetition of a unit pattern in a plane parallel to the upper surface.

Abstract: An electronic circuit is provided that performs binary computation operations and includes word, bit and source lines, and memory cells organized in rows and columns. Each cell includes one pair of memristors and one pair of switches, each memristor being connected to a switch and linked to the same source line during each computation operation, each pair of memristors storing a binary value; the switches being linked to a word line and to a pair of complementary bit lines. The circuit includes a reading module that includes a logic unit for each column, each including an input terminal connected to a source line to receive a column value, the logic unit toggling between values, depending on a comparison of the column value with a toggle threshold value; and a modification unit for modifying a difference between the column and threshold values.

Abstract: This electronic circuit implements calculation operations each providing a binary output, and comprises word lines; pairs of complementary bit lines; source lines; a set of memory cells organized according to a matrix including rows and columns, the memory cells of a same row being selectable by a word line, the memory cells of a same column being connected to a pair of complementary bit lines and to a source line; and a reading device implemented during each calculation operation. Each memory cell comprises two memristors and two switches.

Abstract: A data storage circuit of NOR type includes a three-dimensional memory structure, produced on a first semiconductor substrate, and comprising a plurality of memory planes, each plane forming a two-dimensional array of memory cells. Each memory cell has a selection node, a first input/output node and a second input/output node. The three-dimensional memory structure has an upper surface comprising a plurality of connectors distributed over the surface; each connector is connected to at least one among the first or second input/output nodes of a given column; a control circuit produced on a second semiconductor substrate; an interconnection structure comprising: a plurality of bonding pads placed between the control circuit and the upper surface; the plurality of bonding pads forms a periodic repetition of a unit pattern in a plane parallel to the upper surface.

Abstract: The electronic circuit performs binary computation operations and comprises word, bit and source lines, and memory cells organized in rows and columns. Each cell includes one pair of memristors and one pair of switches, each memristor being connected to a switch and linked to the same source line during each computation operation, each pair of memristors storing a binary value; the switches being linked to a word line and to a pair of complementary bit lines. The circuit comprises a reading module including: a logic unit for each column, each comprising an input terminal connected to a source line to receive a column value, the logic unit toggling between values, depending on a comparison of the column value with a toggle threshold value; a modification unit for modifying, for at least one logic unit and depending on the computation operation, a difference between the column and threshold values.

Abstract: The present invention relates to a neuromorphic circuit suitable for implementing a neural network, the neuromorphic circuit comprising: lines of words, pairs of complementary bit-lines, source lines, a set of elementary cells, an electronic circuit implementing a neurone having an output and including: a set of logic components, a counting unit, a comparison unit comprising a comparator and a comparison voltage generator, the comparator being suitable for comparing the output of the counting unit with the comparison voltage generated by the comparison voltage generator in order to output a signal dependent on the comparison and corresponding to the output of the electronic circuit which implements a neurone.