Abstract: Metal fuses and self-aligned gate edge (SAGE) architectures having metal fuses are described. In an example, an integrated circuit structure includes a plurality of semiconductor fins protruding through a trench isolation region above a substrate. A first gate structure is over a first of the plurality of semiconductor fins. A second gate structure is over a second of the plurality of semiconductor fins. A gate edge isolation structure is laterally between and in contact with the first gate structure and the second gate structure. The gate edge isolation structure is on the trench isolation region and extends above an uppermost surface of the first gate structure and the second gate structure. A metal fuse is on the gate edge isolation structure.

Abstract: Metal fuses and self-aligned gate edge (SAGE) architectures having metal fuses are described. In an example, an integrated circuit structure includes a plurality of semiconductor fins protruding through a trench isolation region above a substrate. A first gate structure is over a first of the plurality of semiconductor fins. A second gate structure is over a second of the plurality of semiconductor fins. A gate edge isolation structure is laterally between and in contact with the first gate structure and the second gate structure. The gate edge isolation structure is on the trench isolation region and extends above an uppermost surface of the first gate structure and the second gate structure. A metal fuse is on the gate edge isolation structure.

Abstract: Metal fuses and self-aligned gate edge (SAGE) architectures having metal fuses are described. In an example, an integrated circuit structure includes a plurality of semiconductor fins protruding through a trench isolation region above a substrate. A first gate structure is over a first of the plurality of semiconductor fins. A second gate structure is over a second of the plurality of semiconductor fins. A gate edge isolation structure is laterally between and in contact with the first gate structure and the second gate structure. The gate edge isolation structure is on the trench isolation region and extends above an uppermost surface of the first gate structure and the second gate structure. A metal fuse is on the gate edge isolation structure.

Abstract: Metal fuses and self-aligned gate edge (SAGE) architectures having metal fuses are described. In an example, an integrated circuit structure includes a plurality of semiconductor fins protruding through a trench isolation region above a substrate. A first gate structure is over a first of the plurality of semiconductor fins. A second gate structure is over a second of the plurality of semiconductor fins. A gate edge isolation structure is laterally between and in contact with the first gate structure and the second gate structure. The gate edge isolation structure is on the trench isolation region and extends above an uppermost surface of the first gate structure and the second gate structure. A metal fuse is on the gate edge isolation structure.

Abstract: A method for electrical and optical bistable switching, including the following steps: providing a semiconductor device that includes a semiconductor base region of a first conductivity type between semiconductor collector and emitter regions of a second conductivity type, providing a quantum size region in the base region, and providing base, collector and emitter terminals respectively coupled with the base, collector, and emitter regions; providing input electrical signals with respect to the base, collector, and emitter terminals to obtain an electrical output signal and light emission from the base region; providing an optical resonant cavity that encloses at least a portion of the base region and the light emission therefrom, an optical output signal being obtained from a portion of the light in the optical resonant cavity; and modifying the input electrical signals to switch back and forth between a first state wherein the photon density in the cavity is below a predetermined threshold and the optical

Abstract: A method for electrical and optical bistable switching, including the following steps: providing a semiconductor device that includes a semiconductor base region of a first conductivity type between semiconductor collector and emitter regions of a second conductivity type, providing a quantum size region in the base region, and providing base, collector and emitter terminals respectively coupled with the base, collector, and emitter regions; providing input electrical signals with respect to the base, collector, and emitter terminals to obtain an electrical output signal and light emission from the base region; providing an optical resonant cavity that encloses at least a portion of the base region and the light emission therefrom, an optical output signal being obtained from a portion of the light in the optical resonant cavity; and modifying the input electrical signals to switch back and forth between a first state wherein the photon density in the cavity is below a predetermined threshold and the optical

Abstract: A ring cavity light-emitting transistor device, including: a planar semiconductor structure of a semiconductor base layer of a first conductivity type between semiconductor collector and emitter layers of a second conductivity type; base, collector, and emitter metalizations respectively coupled with the base layer, said collector layer, and said emitter layer, the base metalization including at least one annular ring coupled with a surface of the base layer; and an annular ring-shaped optical resonator in a region of the semiconductor structure generally including the interface of the base and emitter regions; whereby application of electrical signals with respect to the base, collector, and emitter metalizations causes light emission in the base layer that propagates in the ring-shaped optical resonator cavity.

Abstract: A ring cavity light-emitting transistor device, including: a planar semiconductor structure of a semiconductor base layer of a first conductivity type between semiconductor collector and emitter layers of a second conductivity type; base, collector, and emitter metalizations respectively coupled with the base layer, said collector layer, and said emitter layer, the base metalization including at least one annular ring coupled with a surface of the base layer; and an annular ring-shaped optical resonator in a region of the semiconductor structure generally including the interface of the base and emitter regions; whereby application of electrical signals with respect to the base, collector, and emitter metalizations causes light emission in the base layer that propagates in the ring-shaped optical resonator cavity.

Abstract: A method for producing laser emission, including the following steps: providing a layered semiconductor structure that includes a substrate, a lower reflector and a semiconductor collector region disposed over the substrate, a semiconductor base region disposed over the collector region, and a semiconductor emitter region disposed over the base region; providing, in the base region, at least one region exhibiting quantum size effects; depositing collector, base, and emitter electrodes respectively coupled with the collector, base, and emitter regions; disposing an insulating upper reflector over at least a portion of the emitter region; and applying electrical signals with respect to the collector, base, and emitter electrodes to produce laser emission from the base region in a vertical resonant optical cavity defined between the lower reflector and the insulating upper reflector.