Abstract: A system includes a display screen positioned to display on an exterior of a host vehicle, a user interface of the host vehicle, and a computer communicatively coupled to the display screen and the user interface. The computer is programmed to, in response to detecting a target vehicle having prespecified indicia, instruct the user interface to output an instruction to an occupant of the host vehicle, and in response to detecting personnel from the target vehicle, instruct the display screen to output a message to the personnel.

Abstract: A system includes a display screen positioned to display on an exterior of a host vehicle, a user interface of the host vehicle, and a computer communicatively coupled to the display screen and the user interface. The computer is programmed to, in response to detecting a target vehicle having prespecified indicia, instruct the user interface to output an instruction to an occupant of the host vehicle, and in response to detecting personnel from the target vehicle, instruct the display screen to output a message to the personnel.

Abstract: This disclosure describes systems, methods, and devices related to multi-modal trip planning and event coordination. A method may include detecting, by a first device, based on first location data of a vehicle, that the vehicle has arrived at a destination location for a passenger of the vehicle; generating directions from the vehicle at the destination location to a physical structure at the destination location; presenting the directions; detecting an image of the passenger exterior to the vehicle at the destination location; identifying, by the at least one processor, based on the image, user information associated with the passenger at the destination location; detecting, based on the user information and second location data associated with a second device of the passenger, a disorientation event associated with the passenger; generating, based on the detecting of the disorientation event, instructions to be presented to the passenger; and presenting the instructions.

Abstract: The invention is an apparatus used to send sound exterior to the vehicle to a location on the interior of a vehicle which corresponds with the sound’s external location. The apparatus adjusts for gain by frequency and shifts frequencies of the audio signals received exterior to the vehicle to generate a modified audio signal. The adjustments include compensation for hearing loss, compensation for audio in the interior of the vehicle, and attenuation adjustments for unwanted exterior noise. The modified audio signal is generated by filtering unwanted audio from the exterior audio, adjusting for gain by frequency and shifting/compressing frequencies according to hearing deficiencies, and adjusting for gain by frequency according to audio in the interior of the vehicle. The modified audio signal may be limited to a maximum gain and then amplified in the interior of the vehicle.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: Methods, systems, and apparatus, including computer program apparatus, implementing techniques for publishing, subscribing to, or playing live appliances. A live appliance includes a current virtual machine image. In publishing, a proxy file of a live appliance file type is provided to the publisher. The type is mapped to a live appliance player; so that when a proxy file is opened, the current virtual machine image is run. The player automatically binds a writeable file system external to the virtual machine image to the image to provide file storage that is accessible from within the virtual machine image and from a host operating system. The player also creates a subscription to the live appliance on the host computer if one does not exist when the proxy file is run. With the subscription, the player runs the then-current virtual machine image whenever the live appliance is run.

Abstract: Methods, systems, and apparatus, including computer program apparatus, implementing techniques for publishing, subscribing to, or playing live appliances. A live appliance includes a current virtual machine image. In publishing, a proxy file of a live appliance file type is provided to the publisher. The type is mapped to a live appliance player; so that when a proxy file is opened, the current virtual machine image is run. The player automatically binds a writeable file system external to the virtual machine image to the image to provide file storage that is accessible from within the virtual machine image and from a host operating system. The player also creates a subscription to the live appliance on the host computer if one does not exist when the proxy file is run. With the subscription, the player runs the then-current virtual machine image whenever the live appliance is run.

Abstract: Methods, systems, and apparatus, including computer program apparatus, implementing techniques for publishing, subscribing to, or playing live appliances. A live appliance includes a current virtual machine image. In publishing, a proxy file of a live appliance file type is provided to the publisher. The type is mapped to a live appliance player; so that when a proxy file is opened, the current virtual machine image is run. The player automatically binds a writeable file system external to the virtual machine image to the image to provide file storage that is accessible from within the virtual machine image and from a host operating system. The player also creates a subscription to the live appliance on the host computer if one does not exist when the proxy file is run. With the subscription, the player runs the then-current virtual machine image whenever the live appliance is run.

Abstract: A universal appliance combines the benefits of a fixed-function CE device with the generality of a PC. The universal appliance includes a host environment for supporting fixed functions and virtual machines that can provide general computing capabilities (e.g., a Windows® OS). The user can select fixed functions and virtual machines for operation on the universal appliance. In some implementations, software environments, including the fixed functions and virtual machines, can be delivered by a universal appliance service provider over a network or other communication medium. The software environments for fixed functions and virtual machines can also be delivered by a removable or portable medium (e.g., a USB flash drive, compact disk, media player, mobile phone). Twenty-four hour server functions can be provided with the universal appliance to allow for automatic data backup, remote access to personal data and an Internet telephone that can accept calls 24 hours a day.

Abstract: Methods, systems, and apparatus, including computer program apparatus, implementing techniques for publishing, subscribing to, or playing live appliances. A live appliance includes a current virtual machine image. In publishing, a proxy file of a live appliance file type is provided to the publisher. The type is mapped to a live appliance player; so that when a proxy file is opened, the current virtual machine image is run. The player automatically binds a writeable file system external to the virtual machine image to the image to provide file storage that is accessible from within the virtual machine image and from a host operating system. The player also creates a subscription to the live appliance on the host computer if one does not exist when the proxy file is run. With the subscription, the player runs the then-current virtual machine image whenever the live appliance is run.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

Abstract: An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.