Abstract: Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a shorter code length, a faster execution time, and ease of reuse in different devices. More particularly, fully compatible voltage sequence generation is introduced that can be applied on the terminals of the flash cells being modified and permits an efficient and time saving management of pulse-verify and verify-pulse switching.

Abstract: Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a shorter code length, a faster execution time, and ease of reuse in different devices. More particularly, fully compatible voltage sequence generation is introduced that can be applied on the terminals of the flash cells being modified and permits an efficient and time saving management of pulse-verify and verify-pulse switching.

Abstract: Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a shorter code length, a faster execution time, and ease of reuse in different devices. More particularly, fully compatible voltage sequence generation is introduced that can be applied on the terminals of the flash cells being modified and permits an efficient and time saving management of pulse-verify and verify-pulse switching.

Abstract: An apparatus and method for improving the performance of an electronic device is disclosed. An idle voltage state is introduced by an adaptive voltage generator when providing or removing a high voltage signal from a line or a node in a circuit. The idle state reduces the undesirable effects of switching disturbances caused by sudden voltage changes in a line or node.

Abstract: A flash memory device includes a flash memory array, a set of non-volatile redundancy registers, a serial interface, and testing logic coupled to the serial interface, the testing logic configured to accept a set of serial commands from an external tester; erase the array; program the array with a test pattern; read the array and compare the results with expected results to identify errors; determine whether the errors can be repaired by substituting a redundant row or column of the array, and if so, generate redundancy information; and program the redundancy information into the non-volatile redundancy registers.

Abstract: An apparatus and method for improving the performance of an electronic device is disclosed. An idle voltage state is introduced by an adaptive voltage generator when providing or removing a high voltage signal from a line or a node in a circuit. The idle state reduces the undesirable effects of switching disturbances caused by sudden voltage changes in a line or node.

Abstract: Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a shorter code length, a faster execution time, and ease of reuse in different devices. More particularly, fully compatible voltage sequence generation is introduced that can be applied on the terminals of the flash cells being modified and permits an efficient and time saving management of pulse-verify and verify-pulse switching.

Abstract: An apparatus and method for improving the performance of an electronic device is disclosed. An idle voltage state is introduced by an adaptive voltage generator when providing or removing a high voltage signal from a line or a node in a circuit. The idle state reduces the undesirable effects of switching disturbances caused by sudden voltage changes in a line or node.

Abstract: Apparatus, systems, and methods are disclosed that operate to trigger a reference voltage generator from a supply voltage detector, compare an output voltage level from the reference voltage generator with a supply voltage, and to generate an enable signal when the supply voltage is greater than the output voltage level. Additional apparatus, systems, and methods are disclosed.

Abstract: Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a shorter code length, a faster execution time, and ease of reuse in different devices. More particularly, fully compatible voltage sequence generation is introduced that can be applied on the terminals of the flash cells being modified and permits an efficient and time saving management of pulse-verify and verify-pulse switching.

Abstract: A flash memory device includes a flash memory array, a set of non-volatile redundancy registers, a serial interface, and testing logic coupled to the serial interface, the testing logic configured to accept a set of serial commands from an external tester; erase the array; program the array with a test pattern; read the array and compare the results with expected results to identify errors; determine whether the errors can be repaired by substituting a redundant row or column of the array, and if so, generate redundancy information; and program the redundancy information into the non-volatile redundancy registers.

Abstract: Apparatus, systems, and methods are disclosed that operate to trigger a reference voltage generator from a supply voltage detector, compare an output voltage level from the reference voltage generator with the a supply voltage, and to generate an enable signal when the supply voltage is greater than the output voltage level. Additional apparatus, systems, and methods are disclosed.

Abstract: An apparatus and method for improving the performance of an electronic device is disclosed. An idle voltage state is introduced by an adaptive voltage generator when providing or removing a high voltage signal from a line or a node in a circuit. The idle state reduces the undesirable effects of switching disturbances caused by sudden voltage changes in a line or node.

Abstract: Aspects for programming a nonvolatile electronic device include performing an initial verify step of a programming algorithm with an initial type of reference voltage value, and performing one or more subsequent verify steps in the programming algorithm with a second type of reference voltage value. Further included is utilizing a read reference voltage for the initial verify step, wherein desired programming is ensured for a cell that falls out of ideal distribution.

Abstract: System and method for the managing of suspend requests in flash memory devices. The system includes a microcontroller performing a modify operation on a flash memory array, a memory coupled to the microcontroller and storing suspend sequence code for causing a suspension of the modify operation when executed by the microcontroller, and suspend circuitry that receives a suspend request from a user to suspend the modify operation and starts the execution of the suspend sequence code.

Abstract: Aspects for program pulse generation during programming of nonvolatile electronic devices include providing a configurable voltage sequence generator to manage verify-pulse and pulse-verify switching as needed during modification operations of a programming algorithm for nonvolatile electronic devices, wherein more efficient modification operations result. In this manner, highly flexible bit sequence generation that can be easily managed by a microcontroller occurs, resulting in a shorter code length, a faster execution time, and ease of reuse in different devices. More particularly, fully compatible voltage sequence generation is introduced that can be applied on the terminals of the flash cells being modified and permits an efficient and time saving management of pulse-verify and verify-pulse switching.

Abstract: System and method for the managing of suspend requests in flash memory devices. The system includes a microcontroller performing a modify operation on a flash memory array, a memory coupled to the microcontroller and storing suspend sequence code for causing a suspension of the modify operation when executed by the microcontroller, and suspend circuitry that receives a suspend request from a user to suspend the modify operation and starts the execution of the suspend sequence code.

Abstract: Aspects for programming a nonvolatile electronic device include performing an initial verify step of a programming algorithm with an initial type of reference voltage value, and performing one or more subsequent verify steps in the programming algorithm with a second type of reference voltage value. Further included is utilizing a read reference voltage for the initial verify step, wherein desired programming is ensured for a cell that falls out of ideal distribution.

Abstract: A configurable mirror sense amplifier system for flash memory having the following features. A power source generates a reference voltage. A plurality of transistors is biased at the reference voltage. The plurality of transistors is each coupled to a second transistor. Each of the plurality of transistors is also configured to provide a current for comparison with the flash memory. The reference voltage is internal, stable and independent from variations of a power supply or temperature. The plurality of transistors is in parallel with one another. A mirror transistor is coupled to the plurality of transistors. The plurality of transistors is configured so that at least one of at least one transistor is activated with a signal in order to provide the current for comparison to the flash memory. Also, the reference voltage may be modified in order to modify the current for comparison to the flash memory.

Abstract: A configurable mirror sense amplifier system for flash memory having the following features. A power source generates a reference voltage. A plurality of transistors is biased at the reference voltage. The plurality of transistors is each coupled to a second transistor. Each of the plurality of transistors is also configured to provide a current for comparison with the flash memory. The reference voltage is internal, stable and independent from variations of a power supply or temperature. The plurality of transistors is in parallel with one another. A mirror transistor is coupled to the plurality of transistors. The plurality of transistors is configured so that at least one of at least one transistor is activated with a signal in order to provide the current for comparison to the flash memory. Also, the reference voltage may be modified in order to modify the current for comparison to the flash memory.