Abstract: In an embodiment an electric circuit arrangement includes a current generator circuit having a first output terminal and configured to generate an output current, a controller configured to generate control signals to control the current generator circuit, a random code generator configured to generate random codes and a counter configured to generate a count, wherein the current generator circuit comprises a plurality of output current paths and a plurality of controllable switching circuits, wherein each of the output current paths includes a respective electrical component to define a current in the respective output current path, wherein a respective one of the controllable switching circuits is coupled to a respective one of the output current paths to connect the respective electrical component to the first output terminal, and wherein the random code generator is configured to provide a respective code derived from a respective one of the random codes.

Abstract: A circuit arrangement comprises a first branch comprising a resistor of variable resistance and a diode-connected bipolar transistor and a second branch comprising a resistor of fixed resistance and another diode-connected bipolar transistor. A control loop reproduces a voltage drop at the resistor of variable resistance to a voltage drop at the resistor of fixed resistance. Output terminals are connected to the bipolar transistors to supply a differential voltage. The circuit arrangement may be used as an analog frontend circuit in a gas sensor or a temperature sensor arrangement.

Abstract: In an embodiment, an ADC converter includes a first injection branch and a second injection branch, a first feedback branch and a second feedback branch, an integration node connected to the first and second injection branches and the first and second feedback branches, an integrator connected to the integration node and a comparator connected downstream of the integrator and configured to generate a comparator output signal to control the first and second feedback branches, wherein the first and second injection branches are configured to provide a charge injection dependent on a respective input quantity to the integration node, wherein the input quantity of the first injection branch is selected from a differential voltage signal, a capacitance dependent signal and a current dependent signal, wherein the input quantity of the second injection branch is selected from another one of the differential voltage signal, the capacitance dependent signal and the current dependent signal, and wherein the first and s

Abstract: A circuit for measuring an unknown resistance of a resistive element comprises a sensor circuit to generate a differential voltage dependent on the resistance of the resistive element and a reference circuit to generate a differential reference voltage and a sigma-delta converter comprising a first stage, wherein a first capacitor is selectively coupled to one of the output terminals of the sensor circuit and a second capacitor is coupled to one of the output terminals of the reference circuit. The circuit generates logarithmically compressed values.

Abstract: In an embodiment an electro-thermal device includes a heater, a readout circuit, a digital controller having a first input coupled to a first output of the readout circuit and a digital sigma-delta modulator having a first input coupled to an output of the digital controller and an output coupled to the heater.

Abstract: A circuit arrangement comprises a first branch comprising a resistor of variable resistance and a diode-connected bipolar transistor and a second branch comprising a resistor of fixed resistance and another diode-connected bipolar transistor. A control loop reproduces a voltage drop at the resistor of variable resistance to a voltage drop at the resistor of fixed resistance. Output terminals are connected to the bipolar transistors to supply a differential voltage. The circuit arrangement may be used as an analog frontend circuit in a gas sensor or a temperature sensor arrangement.

Abstract: In an embodiment an electric circuit arrangement includes a current generator circuit having a first output terminal and to generate an output current, a controller configured to generate control signals to control the current generator circuit, a random code generator configured to generate random codes and a counter configured to generate a count, wherein the current generator circuit comprises a plurality of output current paths and a plurality of controllable switching circuits, wherein each of the output current paths includes a respective electrical component to define a current in the respective output current path, wherein a respective one of the controllable switching circuits is coupled to a respective one of the output current paths to connect the respective electrical component to the first output terminal, wherein the random code generator is configured to provide a respective code derived from a respective one of the random codes, and wherein the controller is configured to use the respective de

Abstract: In an embodiment, an ADC converter includes a first injection branch and a second injection branch, a first feedback branch and a second feedback branch, an integration node connected to the first and second injection branches and the first and second feedback branches, an integrator connected to the integration node and a comparator connected downstream of the integrator and configured to generate a comparator output signal to control the first and second feedback branches, wherein the first and second injection branches are configured to provide a charge injection dependent on a respective input quantity to the integration node, wherein the input quantity of the first injection branch is selected from a differential voltage signal, a capacitance dependent signal and a current dependent signal, wherein the input quantity of the second injection branch is selected from another one of the differential voltage signal, the capacitance dependent signal and the current dependent signal, and wherein the first and s

Abstract: In an embodiment an electro-thermal device includes a heater, a readout circuit, a digital controller having a first input coupled to a first output of the readout circuit and a digital sigma-delta modulator having a first input coupled to an output of the digital controller and an output coupled to the heater.

Abstract: A circuit for measuring an unknown resistance of a resistive element comprises a sensor circuit to generate a differential voltage dependent on the resistance of the resistive element and a reference circuit to generate a differential reference voltage and a sigma-delta converter comprising a first stage, wherein a first capacitor is selectively coupled to one of the output terminals of the sensor circuit and a second capacitor is coupled to one of the output terminals of the reference circuit. The circuit generates logarithmically compressed values.

Abstract: A level shift regulator circuit comprises a level shift transistor (Mls) and an output transistor (Mreg) being arranged in series to the level shift transistor (Mls) in an output path (OP). The circuit comprises a feedback path (FP) being arranged between an input node (IN) of the output path (OP) and a gate connection of the output transistor (Mreg). A current splitter (CS) is provided to split a current of a current source (IS0) coupled to the input node (IN) to reduce the loop gain. A current mirror (CM) is arranged in series to the current splitter (CS) to reduce the signal current provided by the current splitter (CS) to the gate connection of the output transistor (Mreg) to further reduce the gain and to improve stability of the circuit. A first and second filter (F1, F2) may optionally be provided to improve the phase response.

Abstract: A level shift regulator circuit comprises a level shift transistor (Mls) and an output transistor (Mreg) being arranged in series to the level shift transistor (Mls) in an output path (OP). The circuit comprises a feedback path (FP) being arranged between an input node (IN) of the output path (OP) and a gate connection of the output transistor (Mreg). A current splitter (CS) is provided to split a current of a current source (ISO) coupled to the input node (IN) to reduce the loop gain. A current mirror (CM) is arranged in series to the current splitter (CS) to reduce the signal current provided by the current splitter (CS) to the gate connection of the output transistor (Mreg) to further reduce the gain and to improve stability of the circuit. A first and second filter (F1, F2) may optionally be provided to improve the phase response.

Abstract: A coupling circuit has a first and a second transistor (P1, P2) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2), bulk terminals of the first and the second transistor (P1, P2) are commonly connected to a drain terminal of the second transistor (P2), and a gate terminal of the first transistor (P1) is connected to a gate terminal of the second transistor (P2). The coupling circuit further comprises a gate control circuit (10) with a charge pump circuit (110) which is configured to generate a negative potential. The gate control circuit (10) is configured to control a gate voltage at the gate terminals of the first and the second transistor (P1, P2) based on a negative potential.

Abstract: A coupling circuit has a first and a second transistor (P1, P2) of a p-channel field-effect transistor type. A drain terminal of the first transistor (P1) is connected to a signal input (1), source terminals of the first and the second transistor (P1, P2) are commonly connected to a signal output (2), bulk terminals of the first and the second transistor (P1, P2) are commonly connected to a drain terminal of the second transistor (P2), and a gate terminal of the first transistor (P1) is connected to a gate terminal of the second transistor (P2). The coupling circuit further comprises a gate control circuit (10) with a charge pump circuit (110) which is configured to generate a negative potential. The gate control circuit (10) is configured to control a gate voltage at the gate terminals of the first and the second transistor (P1, P2) based on a negative potential.