Abstract: A display device includes: a first substrate including a pixel area and a transmissive area; a thin-film transistor on the first substrate; a planarization layer on the thin-film transistor; a first light emitting electrode on the planarization layer; a bank covering a part of the first light emitting electrode; a light emitting layer on the first light emitting electrode; and a second light emitting electrode on the light emitting layer and the bank. The transmissive area includes a transmissive hole penetrating the bank and the planarization layer.

Abstract: A crop harvesting apparatus includes a pressure generator configured to generate a pressure, a driver configured to have a shape that changes in response to receiving the pressure from the pressure generator, and a cutter configured to cut an object to be cut in accordance with a change in the shape of the driver.

Abstract: A method of manufacturing an integrated circuit device includes forming multilayered stack structures that extend parallel to and separated from one another on a substrate, followed by forming a buried conductive layer including a plurality of conductive line patterns that extend parallel to an extending direction of the multilayered stack structures and alternate with the multilayered stack structures; removing portions of the buried conductive layer to thereby separate the plurality of conductive line patterns of the buried conductive layer from one another as a plurality of contact plugs and, at the same time, form a plurality of insulating fence spaces that alternate with the plurality of contact plugs in the extending direction of the multilayered stack structures; and forming a plurality of insulating fences that fill the plurality of insulating fence spaces and include a plurality of insulating line patterns extending parallel to one another.

Abstract: A method of manufacturing an integrated circuit device includes forming multilayered stack structures that extend parallel to and separated from one another on a substrate, followed by forming a buried conductive layer including a plurality of conductive line patterns that extend parallel to an extending direction of the multilayered stack structures and alternate with the multilayered stack structures; removing portions of the buried conductive layer to thereby separate the plurality of conductive line patterns of the buried conductive layer from one another as a plurality of contact plugs and, at the same time, form a plurality of insulating fence spaces that alternate with the plurality of contact plugs in the extending direction of the multilayered stack structures; and forming a plurality of insulating fences that fill the plurality of insulating fence spaces and include a plurality of insulating line patterns extending parallel to one another.

Abstract: Provided are a diffractive element for optical pickup and an optical module including the diffractive element. The diffractive element includes a plurality of diffraction patterns, and the diffraction patterns include a main diffraction pattern for creating diffraction characteristics, and an alignment mark pattern for recognizing an alignment position, the alignment mark pattern having a different pitch from the main diffraction pattern. Also, the pitch of the alignment mark pattern is formed smaller than that of the main diffraction pattern. Further, a ratio of the pitch of the alignment mark pattern to that of the main diffraction pattern is ? or greater to ½ or less.

Abstract: Provided is a device for generating a chaotic signal comprising a PN signal generator that is composed of a digital logic circuit and generates a digital pseudo random signal with a predetermined frequency; a voltage control that generates a clock signal with a predetermined frequency; a mixer that mixes the pseudo random signal and the clock signal so as to generate a chaotic signal to output; and a band-pass filter that filters the chaotic signal, output from the mixer, into a chaotic signal of a desired band and then outputs the filtered signal.

Abstract: According to embodiments of the invention, a bit line interlayer insulating layer is placed over a semiconductor substrate. Two adjacent bit line patterns are placed in parallel on the bit line interlayer insulating layer and each of the two adjacent bit line patterns includes a bit line and a bit line capping layer pattern stacked thereon. A buried contact interlayer insulating layer covers a surface of the semiconductor substrate having the two adjacent bit line patterns. A contact hole is placed in a portion between the bit line patterns to penetrate the buried contact interlayer insulating layer and the bit line interlayer insulating layer and to expose at least one side wall of the bit line patterns. A contact hole spacer covers side wall of the contact hole. A contact hole plug is placed on the contact hole spacer to fill the contact hole.

Abstract: A method for power saving in an ad hoc wireless computer network determines an optimal ATIM message exchange window. The method (a) determines an effective number of nodes that participate in exchanges of ATIM messages during an ATIM window; (b) using the effective number of nodes, calculating a length for a data frame transmission window; and (c) calculates a length for the ATIM window using the calculated data frame transmission window. In one instance, the method determines the effective number of nodes based on the number of senders of ATIM messages. In another instance, the effective number of nodes is determined based on both senders and recipients of the ATIM messages. The method may determine the effective number of nodes from a number of successful ATIM message transmissions in a given time period. The calculated ATIM window size can be provided as an initial value to other methods that dynamically adjust the ATIM window size.

Abstract: A semiconductor device with dummy patterns and methods of designing and making dummy patterns of a semiconductor device are provided. The method includes forming a first layout having main patterns, adding dot dummy patterns to the first layout to generate a second layout, and adding linked line/space dummy patterns to the second layout to generate a third layout. The dot dummy patterns may be oblique dot dummy patterns.

Abstract: Methods are disclosed to support power saving states of a beacon station in an ad hoc wireless local area network (WLAN). Some of the methods allow exchanging power management information among stations in the wireless network and to allow beacon station handovers. In some methods, always-on stations are given a higher priority to become a beacon station or a beacon station handover destination. The methods achieve good power saving while minimizing beacon handover frequency.

Abstract: Methods for increasing power saving in a station that sends or receives frames in an ad hoc wireless network (e.g., IBSS), while allowing the station to enter a power-saving mode quickly upon completion of scheduled tasks. At the same time, a method of the present invention allows two stations in the ad hoc wireless network to infer each other's power management mode without requiring an ATIM/ACK exchange between the STAs within an ATIM window. Consequently, a station may enter a power-saving mode promptly without impairing the station's ability to receive packets. In one embodiment, a “more data” field is used between stations to exchange information. Stations with various computation abilities provide information under different time constraints. The stations may enter power-saving modes that send multicast/broadcast frames or use promiscuous mode within an ATIM window.

Abstract: According to embodiments of the invention, a bit line interlayer insulating layer is placed over a semiconductor substrate. Two adjacent bit line patterns are placed in parallel on the bit line interlayer insulating layer and each of the two adjacent bit line patterns includes a bit line and a bit line capping layer pattern stacked thereon. A buried contact interlayer insulating layer covers a surface of the semiconductor substrate having the two adjacent bit line patterns. A contact hole is placed in a portion between the bit line patterns to penetrate the buried contact interlayer insulating layer and the bit line interlayer insulating layer and to expose at least one side wall of the bit line patterns. A contact hole spacer covers side wall of the contact hole. A contact hole plug is placed on the contact hole spacer to fill the contact hole.

Abstract: According to embodiments of the invention, a bit line interlayer insulating layer is placed over a semiconductor substrate. Two adjacent bit line patterns are placed in parallel on the bit line interlayer insulating layer and each of the two adjacent bit line patterns includes a bit line and a bit line capping layer pattern stacked thereon. A buried contact interlayer insulating layer covers a surface of the semiconductor substrate having the two adjacent bit line patterns. A contact hole is placed in a portion between the bit line patterns to penetrate the buried contact interlayer insulating layer and the bit line interlayer insulating layer and to expose at least one side wall of the bit line patterns. A contact hole spacer covers side wall of the contact hole. A contact hole plug is placed on the contact hole spacer to fill the contact hole.

Abstract: In a fast active scanning wireless network apparatus and method for quick determination of available access points (20), information about a candidate set of available access points (20) is obtained, and a candidate access point is identified from the candidate set. A mobile station (10) then queries the candidate access point with a probe request that designates the candidate access point as a sole responder. The probe request prevents other access points from contending for the medium of communication between the mobile station and the designated sole responder access point by excluding the attempt by other access points (20) to transmit probe responses. The apparatus and method thus increases the probability of a fast and successful probe request from the mobile station and subsequent response from the designated access point (20). The designated access point may also respond with a probe response of high priority, preventing intervention of communication.

Abstract: Channel scanning for wireless networks, such as Wireless Local Area Networks (WLANs), generally provides a wireless station with the information on the available WLAN resources, such as the frequency band and the maximum transmission power. The present invention provides safe and fast domain-aware channel scanning, enabling a wireless station to comply with applicable local regulations, in spite of the possibility of domain changes, with short channel-scanning time. Fast channel scanning is accomplished by active channel scanning if valid domain information is available and there is no possibility of domain change. Also, domain-independent channels, if any, are first scanned using active scan to get domain information faster.

Abstract: Packet communication method and system in which a packet destined for a terminal is provided service according to a service table indexed by packet classification and the terminal's power mode. The service table may specify for a connection a predetermined quality of service or discarding the packet. For a power mode having an alerting (i.e., paging) mechanism, the service may include alerting the terminal. The service table may also include a network edge point's own service requests and service requests from terminals, provisioning servers, and handoff sources. For a multicast or broadcast packet, as each terminal may be in a different power mode, the associated service in the service table may therefore be different for each terminal. In that case, the packet is provided with service so that any given terminal is provided with at least the quality of service specified in the service table. Thus, a multicast or broadcast packet is discarded when the service specified for all terminals is “discard.

Abstract: A method and communication system for supporting dormant mode are described. In one embodiment, the communication system comprises a wireless station operable in a power savings mode and group of access points. Each group of access points comprises one or more access points with at least one group of access points having at least two access points. Ranges for the one or more access points in each of the groups define a paging area for each group, wherein one access point uses a paging channel for paging the wireless station when the wireless station is in the power savings mode and is in the paging area associated with the one access point.

Abstract: According to embodiments of the invention, a bit line interlayer insulating layer is placed over a semiconductor substrate. Two adjacent bit line patterns are placed in parallel on the bit line interlayer insulating layer and each of the two adjacent bit line patterns includes a bit line and a bit line capping layer pattern stacked thereon. A buried contact interlayer insulating layer covers a surface of the semiconductor substrate having the two adjacent bit line patterns. A contact hole is placed in a portion between the bit line patterns to penetrate the buried contact interlayer insulating layer and the bit line interlayer insulating layer and to expose at least one side wall of the bit line patterns. A contact hole spacer covers side wall of the contact hole. A contact hole plug is placed on the contact hole spacer to fill the contact hole.

Abstract: A method for forming an isolation region of a semiconductor device includes the steps of forming first and second insulating layers on a substrate, removing the second insulating layer over an isolation region, forming an oxide layer by oxidizing the first insulating layer over the isolation region, forming sidewall spacers at sides of the second insulating layer and over the isolation region, forming a trench by etching the oxide layer and the substrate at the isolation region, removing the sidewall spacers, forming a third insulating layer on the substrate in the trench, and forming an isolation layer in the trench.