Abstract: The present disclosure relates to a simulation apparatus for secondary battery production.

Abstract: Provided is an apparatus for manufacturing a display device and a method for manufacturing the display device. The apparatus for manufacturing a display device comprises a jig having a seating surface that is formed to be bent at least partly and on which a target object is seated, a gasket covering the seating surface at least partly, and a roller pressing the target object.

Abstract: Provided is an apparatus for manufacturing a display device and a method for manufacturing the display device. The apparatus for manufacturing a display device comprises a jig having a seating surface that is formed to be bent at least partly and on which a target object is seated, a gasket covering the seating surface at least partly, and a roller pressing the target object.

Abstract: In a method of inspecting a mask, an image of a pattern on the mask may be obtained. A histogram of the image by grey levels may be obtained. The histogram may be compared with information of the pattern to detect a defect of the mask. Thus, reliability of defect detection in the mask may be remarkably improved.

Abstract: In a method of designing a mask layout, a wiring region for forming a metal wire is established, the wiring region having at least a standard width. Contact regions for forming contacts electrically connected to the metal wire are established in the wiring region. The contact regions adjacent to each other are grouped to divide the wiring region into a first region and a second region including the contact regions. First dummy regions are established in the first region, the first dummy regions corresponding to regions for forming first dummy patterns. Second dummy regions are established among the contact regions in the second region, the second dummy regions corresponding to regions for forming second dummy patterns.

Abstract: Provided are a system for analyzing a mask topography, which can reduce calculation time and increase calculation accuracy in consideration of a mask topography effect, and a method of forming an image using the system. The system and method simultaneously obtains a first electric field using a Kirchhoff method without considering a pitch formed on a mask and obtains a second electric field using an electromagnetic field analysis method considering the pitch, and then determines a third electric field on a pupil surface of a projection lens by combining the first electric field and the second electric field of forming an image, so as to calculate the image of an optical lithography system which includes an illumination system and a projection optical system and to which the projection lens belongs.

Abstract: In a method of inspecting a mask, an image of a pattern on the mask may be obtained. A histogram of the image by grey levels may be obtained. The histogram may be compared with information of the pattern to detect a defect of the mask. Thus, reliability of defect detection in the mask may be remarkably improved.

Abstract: A method and an apparatus for verifying a logic circuit, capable of quicker operation, being applied to a logic gate-level or transistor-level circuit design, and verifying timing and analog signal characteristics of a signal. The logic circuit verification method includes a wave file generation stage and a logic circuit verification stage. The wave file generation stage generates a wave file that includes the waveforms of all nodes of the logic circuit using a design source file of the logic circuit. The stage of verification of the logic circuit verifies the logic circuit using a design reference file, which includes ideal operations of all the nodes of the logic circuit, and the wave file.

Abstract: A mask set with a light-transmitting region of a controlled size includes a plurality of masks for performing in-situ synthesis on probes of a microarray, wherein each mask includes a light-transmitting region and a light-blocking region, and the size of the light-transmitting region is equal to or greater than about 5% of the total size of the light-transmitting and light-blocking regions.

Abstract: In a method of designing a mask layout, a wiring region for forming a metal wire is established, the wiring region having at least a standard width. Contact regions for forming contacts electrically connected to the metal wire are established in the wiring region. The contact regions adjacent to each other are grouped to divide the wiring region into a first region and a second region including the contact regions. First dummy regions are established in the first region, the first dummy regions corresponding to regions for forming first dummy patterns. Second dummy regions are established among the contact regions in the second region, the second dummy regions corresponding to regions for forming second dummy patterns.

Abstract: A method for estimating statistical distribution characteristics of physical parameters of a semiconductor device includes manufacturing a plurality of semiconductor device chips, each having a plurality of transistors, preparing electrical characteristic data by measuring electrical characteristics of the plurality of transistors included in the plurality of chips, extracting an inter-chip distribution characteristic and an intra-chip distribution characteristic of the electrical characteristics by analyzing the electrical characteristic data, generating random number data satisfying the extracted inter-chip and intra-chip distribution characteristics, and performing a simulation for extracting statistical distribution characteristic data of the physical parameters of the chips, based on the random number data.

Abstract: Provided are a method and apparatus for designing a fine pattern that can be entirely transferred onto an object. The method includes reading the original data of a fine pattern for exposure. The fine pattern is divided into a first pattern not requiring revision and a second pattern requiring revision. The fine pattern is revised by forming an auxiliary pattern maintaining a first distance D1 from the second pattern. A fine pattern to be transferred onto a target object is estimated by running an emulation program including a first auxiliary pattern and a second auxiliary pattern. The estimated fine pattern is compared to the original data of the fine pattern for exposure, and the revised fine pattern is designated as a final fine pattern if there is no difference between the estimated fine pattern and the original data of the fine pattern for exposure.

Abstract: In a mask for forming a fine pattern to completely transfer a first and a second pattern from the mask onto a receiving object, and a method of forming the mask, the mask includes a first pattern, a second pattern, and a supplemental pattern. The first pattern repeats in a first direction. The second pattern is arranged between and parallel to the first pattern and has a first width W1. The supplemental pattern is disposed between the first pattern and the second pattern, and is spaced apart by a first distance D1 in the first direction from the second pattern.

Abstract: A method for simulating an integrated circuit includes performing a power supply voltage tuning operation to find a power supply voltage at which a simulation of the integrated circuit at an operating frequency passes a functional requirement, identifying a weak signal node based on the simulation result, and performing a size tuning operation on the weak signal node of the integrated circuit.

Abstract: Provided are a mask set for in-situ synthesizing probes of a microarray, a method of fabricating the mask set, and a method of fabricating the microarray using the mask set. A mask set for a microarray includes a plurality of masks for in-situ synthesizing probes onto a substrate which includes an array of a plurality of probe cells, wherein each mask includes light-transmitting regions and light-blocking regions, each probe cell corresponds to a light-transmitting region or a light-blocking region, and a pattern of each light-transmitting region is corrected for an optical proximity effect.

Abstract: A mask set with a light-transmitting region of a controlled size includes a plurality of masks for performing in-situ synthesis on probes of a microarray, wherein each mask includes a light-transmitting region and a light-blocking region, and the size of the light-transmitting region is equal to or greater than about 5% of the total size of the light-transmitting and light-blocking regions.

Abstract: Provided are a system for analyzing a mask topography, which can reduce calculation time and increase calculation accuracy in consideration of a mask topography effect, and a method of forming an image using the system. The system and method simultaneously obtains a first electric field using a Kirchhoff method without considering a pitch formed on a mask and obtains a second electric field using an electromagnetic field analysis method considering the pitch, and then determines a third electric field on a pupil surface of a projection lens by combining the first electric field and the second electric field of forming an image, so as to calculate the image of an optical lithography system which includes an illumination system and a projection optical system and to which the projection lens belongs.

Abstract: A method of creating a layout of a set of masks including an alternating phase shifting mask (APSM) and a halftone phase shifting trim mask (HPSTM) is provided. The APSM includes first and second phase shifting areas and a first opaque pattern. The first and second phase shifting areas are disposed adjacent to each other and have different phases for generating destructive interference. Further, the first and second phase shifting areas define an access interconnection line. The first opaque pattern is formed on a transparent substrate to define the first and second phase shifting areas. The HPSTM includes a second opaque pattern on the transparent substrate and a halftone pattern. The second opaque pattern prevents an access interconnection line from being erased. The halftone pattern defines a pass interconnection line connected to the access interconnection line.

Abstract: In a mask for forming a fine pattern to completely transfer a first and a second pattern from the mask onto a receiving object, and a method of forming the mask, the mask includes a first pattern, a second pattern, and a supplemental pattern. The first pattern repeats in a first direction. The second pattern is arranged between and parallel to the first pattern and has a first width W1. The supplemental pattern is disposed between the first pattern and the second pattern, and is spaced apart by a first distance D1 in the first direction from the second pattern.

Abstract: Provided are a method and apparatus for designing a fine pattern that can be entirely transferred onto an object. The method includes reading the original data of a fine pattern for exposure. The fine pattern is divided into a first pattern not requiring revision and a second pattern requiring revision. The fine pattern is revised by forming an auxiliary pattern maintaining a first distance D1 from the second pattern. A fine pattern to be transferred onto a target object is estimated by running an emulation program including a first auxiliary pattern and a second auxiliary pattern. The estimated fine pattern is compared to the original data of the fine pattern for exposure, and the revised fine pattern is designated as a final fine pattern if there is no difference between the estimated fine pattern and the original data of the fine pattern for exposure.