Patents by Inventor Moon-Keun Lee
Moon-Keun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240079529Abstract: A light-emitting element includes a first semiconductor layer, a light-emitting layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the light-emitting layer, a device electrode layer disposed on the second semiconductor layer, a reflective electrode layer disposed on the device electrode layer, an insulating film surrounding a side surface of the light-emitting layer, a side surface of the second semiconductor layer, and a side surface of the device electrode layer, and a reflective layer surrounding a side surface of the insulating film, wherein the side surface of the device electrode layer is aligned with a side surface of the reflective electrode layer.Type: ApplicationFiled: April 10, 2023Publication date: March 7, 2024Applicant: Samsung Display Co., LTD.Inventors: Ji Hyun HAM, Moon Jung AN, Jin Seok PARK, Hee Keun LEE, Sung Chan JO, Sang Wook HAN
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Publication number: 20230256429Abstract: A modular fluidic chip includes a body configured to have at least one flow channel formed in an inside thereof and be connected to another modular fluidic chip to allow the at least one flow channel to communicate with a flow channel provided in the other modular fluidic chip. A fluidic chip capable of performing one function is formed in the form of a module, whereby a fluidic flow system of various structures can be implemented without restriction in shape or size by connecting a plurality of fluidic chips capable of performing different functions as necessary. Through this, various and accurate experimental data can be obtained, and when a specific portion is deformed or damaged, only the fluidic chip corresponding thereto can be replaced, thereby reducing manufacture and maintenance costs.Type: ApplicationFiled: April 20, 2023Publication date: August 17, 2023Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Seok Jae LEE, Moon Keun LEE, Nam Ho BAE, Tae Jae LEE, Kyoung Gyun LEE, Yoo Min PARK
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Patent number: 11666902Abstract: A modular fluidic chip includes a body configured to have at least one flow channel formed in an inside thereof and be connected to another modular fluidic chip to allow the at least one flow channel to communicate with a flow channel provided in the other modular fluidic chip. A fluidic chip capable of performing one function is formed in the form of a module, whereby a fluidic flow system of various structures can be implemented without restriction in shape or size by connecting a plurality of fluidic chips capable of performing different functions as necessary. Through this, various and accurate experimental data can be obtained, and when a specific portion is deformed or damaged, only the fluidic chip corresponding thereto can be replaced, thereby reducing manufacture and maintenance costs.Type: GrantFiled: July 25, 2019Date of Patent: June 6, 2023Assignee: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Seok Jae Lee, Moon Keun Lee, Nam Ho Bae, Tae Jae Lee, Kyoung Gyun Lee, Yoo Min Park
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Publication number: 20230153993Abstract: A method for providing quantitative information for targets and a device using the same according to an exemplary embodiment of the present disclosure are provided. A quantitative information providing method for targets according to the exemplary embodiment of the present disclosure includes flowing a plurality of microdroplets into a chamber or a channel including a detection region acquiring a single layer of microdroplets in which the plurality of microdroplets is present as a single layer, and providing quantitative data of targets based on the single layer image of the microdroplets, and the detection region has a height which is one time to about two times of a diameter of the plurality of microdroplets and is defined as a region in which the plurality of microdroplets is dispersed in a plurality of columns to fill the detection region.Type: ApplicationFiled: December 20, 2021Publication date: May 18, 2023Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Kyoung Gyun LEE, Seok Jae LEE, Nam Ho BAE, Dong Gee RHO, Tae Jae LEE, Moon Keun LEE, Yoo Min PARK
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Patent number: 11618018Abstract: A modular fluid chip according to an embodiment of the present disclosure includes a body including at least one first hole which allows fluid to flow therethrough; and a housing receiving the body therein, and including a second hole which corresponds to the at least one first hole and allows the fluid to flow therethrough, and a fluid connection part which is connectable to another modular fluid chip.Type: GrantFiled: July 25, 2019Date of Patent: April 4, 2023Assignee: Korea Advanced Institute of Science and TechnologyInventors: Moon Keun Lee, Seok Jae Lee, Nam Ho Bae, Tae Jae Lee, Kyoung Gyun Lee, Yoo Min Park
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Publication number: 20210308672Abstract: A modular fluid chip according to an embodiment of the present disclosure includes a body including at least one first hole which allows fluid to flow therethrough; and a housing receiving the body therein, and including a second hole which corresponds to the at least one first hole and allows the fluid to flow therethrough, and a fluid connection part which is connectable to another modular fluid chip.Type: ApplicationFiled: July 25, 2019Publication date: October 7, 2021Inventors: Moon Keun LEE, Seok Jae LEE, Nam Ho BAE, Tae Jae LEE, Kyoung Gyun LEE, Yoo Min PARK
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Publication number: 20210046472Abstract: A modular fluidic chip according to an embodiment of the present disclosure includes a body configured to have at least one flow channel formed in an inside thereof and be connected to another modular fluidic chip to allow the at least one flow channel to communicate with a flow channel provided in the other modular fluidic chip. According to the embodiment of the present disclosure, a fluidic chip capable of performing one function is formed in the form of a module, whereby a fluidic flow system of various structures can be implemented without restriction in shape or size by connecting a plurality of fluidic chips capable of performing different functions as necessary. Through this, various and accurate experimental data can be obtained, and when a specific portion is deformed or damaged, only the fluidic chip corresponding thereto can be replaced, thereby reducing manufacture and maintenance costs.Type: ApplicationFiled: July 25, 2019Publication date: February 18, 2021Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGYInventors: Seok Jae LEE, Moon Keun LEE, Nam Ho BAE, Tae Jae LEE, Kyoung Gyun LEE, Yoo Min PARK
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Patent number: 7868458Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.Type: GrantFiled: December 16, 2008Date of Patent: January 11, 2011Assignee: Hynix Semiconductor Inc.Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
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Publication number: 20090146306Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.Type: ApplicationFiled: December 16, 2008Publication date: June 11, 2009Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
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Patent number: 7476617Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.Type: GrantFiled: February 24, 2006Date of Patent: January 13, 2009Assignee: Hynix Semiconductor Inc.Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
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Patent number: 7302385Abstract: Provided are a speech restoration system and method for concealing packet losses.Type: GrantFiled: July 7, 2003Date of Patent: November 27, 2007Assignee: Electronics and Telecommunications Research InstituteInventors: Ho Sang Sung, Dae Hwan Hwang, Moon Keun Lee, Ki Seung Lee, Young Cheol Park, Dae Hee Youn
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Publication number: 20060157742Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.Type: ApplicationFiled: February 24, 2006Publication date: July 20, 2006Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
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Patent number: 7037827Abstract: A semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. The titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer. An epitaxially grown titanium silicide layer having a phase of C49 and is formed on the exposed silicon substrate disposed within the contact hole; and a metal layer is formed on an upper surface of the titanium silicide layer.Type: GrantFiled: December 30, 2003Date of Patent: May 2, 2006Assignee: Hynix Semiconductor Inc.Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
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Publication number: 20040180543Abstract: A semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. The titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer. An epitaxially grown titanium silicide layer having a phase of C49 and is formed on the exposed silicon substrate disposed within the contact hole; and a metal layer is formed on an upper surface of the titanium silicide layer.Type: ApplicationFiled: December 30, 2003Publication date: September 16, 2004Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee