Patents by Inventor Moon Shone

Moon Shone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6521495
    Abstract: A non-volatile memory device and a fabrication method thereof, wherein the non-volatile memory device includes first and second memory cells in a region of a semiconductor substrate where a word line crosses a bit line. Thus, one word line can control the operation of two memory cells, and the device requires less area. Further an intergate dielectric layer extends to the side walls of the floating gate allowing more area and a higher coupling ratio. A lower voltage may therefore be applied to the control gate. During an erasing operation the path of electrons can be redirected toward the substrate. Deterioration of a tunneling insulating layer is thereby reduced or eliminated.
    Type: Grant
    Filed: May 14, 2001
    Date of Patent: February 18, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon Shone, Ji-nam Kim
  • Publication number: 20010021561
    Abstract: A non-volatile memory device and a fabrication method thereof, wherein the non-volatile memory device includes first and second memory cells in a region of a semiconductor substrate where a word line crosses a bit line. Thus, one word line can control the operation of two memory cells, and the device requires less area. Further an intergate dielectric layer extends to the side walls of the floating gate allowing more area and a higher coupling ratio. A lower voltage may therefore be applied to the control gate. During an erasing operation the path of electrons can be redirected toward the substrate. Deterioration of a tunneling insulating layer is thereby reduced or eliminated.
    Type: Application
    Filed: May 14, 2001
    Publication date: September 13, 2001
    Inventors: Moon Shone, Ji-nam Kim
  • Patent number: 6268622
    Abstract: A non-volatile memory device and a fabrication method thereof, wherein the non-volatile memory device includes first and second memory cells in a region of a semiconductor substrate where a word line crosses a bit line. Thus, one word line can control the operation of two memory cells, and the device requires less area. Further an intergate dielectric layer extends to the side walls of the floating gate allowing more area and a higher coupling ratio. A lower voltage may therefore be applied to the control gate. During an erasing operation the path of electrons can be redirected toward the substrate. Deterioration of a tunneling insulating layer is thereby reduced or eliminated.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: July 31, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Moon Shone, Ji-nam Kim