Patents by Inventor Moon Soo Cho

Moon Soo Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11073283
    Abstract: A turbulence generating structure for liner cooling enhancement is a liner cooling structure applied to a double-structured side portion formed by a liner and a flow sleeve and includes the liner and a first turbulence generator protruding from a surface space of the liner and including a plurality of ribs arranged in an axial direction, each of the ribs comprising blocks arranged at regular distances in the axial direction and interspaced by cooling holes. The ribs include a first set of adjacent ribs separated by a first passage distance, the first passage distance being repeated in a circumferential direction, and a second set of adjacent ribs separated by a second passage distance, the second passage distance being repeated in the circumferential direction, wherein the first and second sets of adjacent ribs have exactly one rib in common, and the first passage distance is greater than the second passage distance.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: July 27, 2021
    Inventors: Sung Wan Park, Jong Hwa Lee, In Chan Choi, Moon Soo Cho
  • Patent number: 11054138
    Abstract: A shroud structure and a combustor burner using the shroud structure are provided for improving swozzle flow. The shroud structure includes a shroud configured to surround a combustion nozzle and a plurality of swirlers provided along a circumferential row of the combustion nozzle, the shroud having an outer circumferential surface in which a plurality of inlets are formed to draw in compressed air flowing outside the shroud, the compressed air being drawn into the shroud before being mixed with fuel. The inlets are disposed, at positions spaced apart from each other, before a circumferential row of the outer circumferential surface of the shroud that faces a first fuel injector provided on an inner circumferential surface of a combustor casing so that compressed air guided into the inlet is supplied to a region formed around a second fuel injector provided in the swirlers in the shroud.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: July 6, 2021
    Inventors: Moon Soo Cho, In Chan Choi
  • Patent number: 10865988
    Abstract: A plate for supporting a plurality of nozzle tubes in a combustion casing of a combustor stably supports the nozzle tubes and adsorbs displacement due to thermal expansion or natural vibrations, thereby reducing combustor maintenance and extending the lifetime of the combustor. The plate includes an inner frame having a plurality of through holes for respectively receiving the plurality of nozzle tubes; a fixing frame fixed on an inner circumferential surface of the combustion casing and configured to support the inner frame; and a mechanical buffer disposed between the fixing frame and the inner frame. The fixing frame has an inner circumferential surface in which a fixing recess having a U-shaped cross-section is formed to receive the mechanical buffer and an outer edge of the inner frame and to receive the mechanical buffer. A method of assembly the nozzle tube support plate facilitates its initial installation and subsequent maintenance.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: December 15, 2020
    Assignee: Doosan Heavy Industries Construction Co., Ltd
    Inventors: Byeong Ha Jeon, Moon Soo Cho
  • Publication number: 20190107281
    Abstract: A shroud structure and a combustor burner using the shroud structure are provided for improving swozzle flow. The shroud structure includes a shroud configured to surround a combustion nozzle and a plurality of swirlers provided along a circumferential row of the combustion nozzle, the shroud having an outer circumferential surface in which a plurality of inlets are formed to draw in compressed air flowing outside the shroud, the compressed air being drawn into the shroud before being mixed with fuel. The inlets are disposed, at positions spaced apart from each other, before a circumferential row of the outer circumferential surface of the shroud that faces a first fuel injector provided on an inner circumferential surface of a combustor casing so that compressed air guided into the inlet is supplied to a region formed around a second fuel injector provided in the swirlers in the shroud.
    Type: Application
    Filed: August 23, 2018
    Publication date: April 11, 2019
    Inventors: Moon Soo CHO, In Chan CHOI
  • Publication number: 20190107054
    Abstract: A turbulence generating structure for liner cooling enhancement is a liner cooling structure applied to a double-structured side portion formed by a liner and a flow sleeve and includes the liner and a first turbulence generator protruding from a surface space of the liner and including a plurality of ribs arranged in an axial direction, each of the ribs comprising blocks arranged at regular distances in the axial direction and interspaced by cooling holes. The ribs include a first set of adjacent ribs separated by a first passage distance, the first passage distance being repeated in a circumferential direction, and a second set of adjacent ribs separated by a second passage distance, the second passage distance being repeated in the circumferential direction, wherein the first and second sets of adjacent ribs have exactly one rib in common, and the first passage distance is greater than the second passage distance.
    Type: Application
    Filed: August 27, 2018
    Publication date: April 11, 2019
    Inventors: Sung Wan PARK, Jong Hwa LEE, In Chan CHOI, Moon Soo CHO
  • Publication number: 20190072278
    Abstract: A plate for supporting a plurality of nozzle tubes in a combustion casing of a combustor stably supports the nozzle tubes and adsorbs displacement due to thermal expansion or natural vibrations, thereby reducing combustor maintenance and extending the lifetime of the combustor. The plate includes an inner frame having a plurality of through holes for respectively receiving the plurality of nozzle tubes; a fixing frame fixed on an inner circumferential surface of the combustion casing and configured to support the inner frame; and a mechanical buffer disposed between the fixing frame and the inner frame. The fixing frame has an inner circumferential surface in which a fixing recess having a U-shaped cross-section is formed to receive the mechanical buffer and an outer edge of the inner frame and to receive the mechanical buffer. A method of assembly the nozzle tube support plate facilitates its initial installation and subsequent maintenance.
    Type: Application
    Filed: August 23, 2018
    Publication date: March 7, 2019
    Inventors: Byeong Ha JEON, Moon Soo CHO
  • Patent number: 9865677
    Abstract: Provided is a super junction semiconductor device. The super junction semiconductor device includes a vertical pillar region located in an active region and horizontal pillar regions located in a termination region that are connected with each other while simultaneously not floating the entire pillar region in the termination region. Thus, a charge compensation difference, generated among pillar regions, is caused to be offset, although the length of the termination region is relatively short.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: January 9, 2018
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Hyuk Woo, Dae Byung Kim, Chang Yong Choi, Ki Tae Kang, Kwang Yeon Jun, Moon Soo Cho, Soon Tak Kwon
  • Patent number: 9496335
    Abstract: There is provided a super junction semiconductor device and a method of manufacturing the same. A super junction semiconductor device includes an n-type semiconductor region disposed in a substrate, two or more p-type semiconductor regions disposed adjacent to the n-type semiconductor region alternately in a direction parallel to a surface of the substrate, a p-type body region disposed on at least one of the p-type semiconductor regions, and a source region disposed in the p-type body region, and an n-type ion implantation region is formed along a lower end of the n-type semiconductor region and lower ends of the p-type semiconductor regions.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: November 15, 2016
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Kwang Yeon Jun, Chang Yong Choi, Hyuk Woo, Moon Soo Cho, Soon Tak Kwon
  • Patent number: 9472614
    Abstract: There is provided a super junction semiconductor device. The super junction semiconductor device includes a cell area and a junction termination area disposed on a substrate, and a transition area disposed between the cell area and the junction termination area, and the cell area, the junction termination area, and the transition area each include one or more unit cells comprising a N-type pillar region and a P-type pillar region among a plurality of N-type pillar regions and a P-type pillar regions that are alternated between the cell area and the junction termination area.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: October 18, 2016
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Moon Soo Cho, Chang Yong Choi, Soon Tak Kwon, Kwang Yeon Jun, Dae Byung Kim, Hyuk Woo
  • Publication number: 20160035825
    Abstract: There is provided a super junction semiconductor device and a method of manufacturing the same. A super junction semiconductor device includes an n-type semiconductor region disposed in a substrate, two or more p-type semiconductor regions disposed adjacent to the n-type semiconductor region alternately in a direction parallel to a surface of the substrate, a p-type body region disposed on at least one of the p-type semiconductor regions, and a source region disposed in the p-type body region, and an n-type ion implantation region is formed along a lower end of the n-type semiconductor region and lower ends of the p-type semiconductor regions.
    Type: Application
    Filed: October 14, 2015
    Publication date: February 4, 2016
    Applicant: MAGNACHIP SEMICONDUCTOR, LTD.
    Inventors: Kwang Yeon JUN, Chang Yong CHOI, Hyuk WOO, Moon Soo CHO, Soon Tak KWON
  • Publication number: 20160020273
    Abstract: Provided is a super junction semiconductor device. The super junction semiconductor device includes a vertical pillar region located in an active region and horizontal pillar regions located in a termination region that are connected with each other while simultaneously not floating the entire pillar region in the termination region. Thus, a charge compensation difference, generated among pillar regions, is caused to be offset, although the length of the termination region is relatively short.
    Type: Application
    Filed: July 14, 2015
    Publication date: January 21, 2016
    Applicant: MAGNACHIP SEMICONDUCTOR, LTD.
    Inventors: Hyuk WOO, Dae Byung KIM, Chang Yong CHOI, Ki Tae KANG, Kwang Yeon JUN, Moon Soo CHO, Soon Tak KWON
  • Patent number: 9190469
    Abstract: There is provided a super junction semiconductor device and a method of manufacturing the same. A super junction semiconductor device includes an n-type semiconductor region disposed in a substrate, two or more p-type semiconductor regions disposed adjacent to the n-type semiconductor region alternately in a direction parallel to a surface of the substrate, a p-type body region disposed on at least one of the p-type semiconductor regions, and a source region disposed in the p-type body region, and an n-type ion implantation region is formed along a lower end of the n-type semiconductor region and lower ends of the p-type semiconductor regions.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: November 17, 2015
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Kwang Yeon Jun, Chang Yong Choi, Hyuk Woo, Moon Soo Cho, Soon Tak Kwon
  • Patent number: 9024381
    Abstract: A semiconductor device and a fabricating method thereof are provided. The semiconductor device includes a substrate, and a super junction area that is disposed above the substrate. The super junction area may include pillars of different doping types that are alternately disposed. One of the pillars of the super junction area may have a doping concentration that gradually decreases and then increases from bottom to top in a vertical direction of the semiconductor device.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: May 5, 2015
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Moon-soo Cho, Kwang-yeon Jun, Hyuk Woo, Chang-sik Lim
  • Publication number: 20150076599
    Abstract: There is provided a super junction semiconductor device. The super junction semiconductor device includes a cell area and a junction termination area disposed on a substrate, and a transition area disposed between the cell area and the junction termination area, and the cell area, the junction termination area, and the transition area each include one or more unit cells comprising a N-type pillar region and a P-type pillar region among a plurality of N-type pillar regions and a P-type pillar regions that are alternated between the cell area and the junction termination area.
    Type: Application
    Filed: March 26, 2014
    Publication date: March 19, 2015
    Applicant: MAGNACHIP SEMICONDUCTOR, LTD.
    Inventors: Moon Soo CHO, Chang Yong CHOI, Soon Tak KWON, Kwang Yeon JUN, Dae Byung KIM, Hyuk WOO
  • Publication number: 20150076600
    Abstract: There is provided a super junction semiconductor device and a method of manufacturing the same. A super junction semiconductor device includes an n-type semiconductor region disposed in a substrate, two or more p-type semiconductor regions disposed adjacent to the n-type semiconductor region alternately in a direction parallel to a surface of the substrate, a p-type body region disposed on at least one of the p-type semiconductor regions, and a source region disposed in the p-type body region, and an n-type ion implantation region is formed along a lower end of the n-type semiconductor region and lower ends of the p-type semiconductor regions.
    Type: Application
    Filed: April 1, 2014
    Publication date: March 19, 2015
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventors: Kwang Yeon JUN, Chang Yong CHOI, Hyuk WOO, Moon Soo CHO, Soon Tak KWON
  • Publication number: 20130217287
    Abstract: Provided is a method for manufacturing a composite material having a thin thickness, a low thermal expansion coefficient and a high thermal dissipation characteristic, the composite material manufactured by the manufacturing method, and a copper clad laminate using the composite material. The composite material using a unidirectional carbon fiber prepreg fabric manufactured through the steps of: manufacturing a unidirectional carbon fiber prepreg; cutting the manufactured unidirectional carbon fiber prepreg to a given width; weaving the unidirectional carbon fiber prepreg cut to the given width to form a fabric; and curing the woven unidirectional carbon fiber prepreg fabric.
    Type: Application
    Filed: February 15, 2013
    Publication date: August 22, 2013
    Inventors: Yun Ho CHO, Moon Soo CHO, Jung Cheol KIM, Seok Won KANG
  • Publication number: 20130161742
    Abstract: A semiconductor device and a fabricating method thereof are provided. The semiconductor device includes a substrate, and a super junction area that is disposed above the substrate. The super junction area may include pillars of different doping types that are alternately disposed. One of the pillars of the super junction area may have a doping concentration that gradually decreases and then increases from bottom to top in a vertical direction of the semiconductor device.
    Type: Application
    Filed: March 29, 2012
    Publication date: June 27, 2013
    Inventors: Moon-soo CHO, Kwang-yeon JUN, Hyuk WOO, Chang-sik LIM
  • Publication number: 20080157189
    Abstract: Disclosed is a power semiconductor device capable of transmitting a gate signal from any upward, downward, leftward, and rightward directions on a plane to reduce deviation in the gate signal's transmission speed and impedance.
    Type: Application
    Filed: October 25, 2005
    Publication date: July 3, 2008
    Inventors: Young Won Lee, Moon Soo Cho