Abstract: A system for high-speed data transfer within a portable device, such as, cell phone or a set-top box, which includes a memory medium and a processor. The system includes a first port for coupling to the processor, and a second port for coupling to the memory medium. Further, the system includes an embedded Universal Serial Bus (USB) host configured for receiving data transfer commands from the processor, and transferring data at high speed between a USB device on the processor and the memory medium. Moreover, a data path is provided between the embedded USB host and the first port.

Abstract: A system for high-speed data transfer within a portable device, such as, cell phone or a set-top box, which includes a memory medium and a processor. The system includes a first port for coupling to the processor, and a second port for coupling to the memory medium. Further, the system includes an embedded Universal Serial Bus (USB) host configured for receiving data transfer commands from the processor, and transferring data at high speed between a USB device on the processor and the memory medium. Moreover, a data path is provided between the embedded USB host and the first port.

Abstract: A system and method for protecting register write operations, especially register write operations performed in a USB PHY. A USB transmitter/receiver, operable to receive a register write command from a USB LINK device, may monitor the write sequence initiated by the register write command to determine if/when the register write sequence has been interrupted. In monitoring the register write sequence, the USB transmitter/receiver is operable to discard the register write command if a DIR signal issued by the USB transmitter/receiver is asserted during the register write sequence and/or if an STP signal received by the USB transmitter/receiver is asserted during the register write sequence, where STP may be part of a normal register write operation. The USB transmitter/receiver is further operable to allow the register write sequence to complete if the STP signal and the DIR signal are not asserted during a predetermined period of the register write sequence.

Abstract: A system and method for protecting register write operations, especially register write operations performed in a USB PHY. A USB transmitter/receiver, operable to receive a register write command from a USB LINK device, may monitor the write sequence initiated by the register write command to determine if/when the register write sequence has been interrupted. In monitoring the register write sequence, the USB transmitter/receiver is operable to discard the register write command if a DIR signal issued by the USB transmitter/receiver is asserted during the register write sequence and/or if an STP signal received by the USB transmitter/receiver is asserted during the register write sequence, where STP may be part of a normal register write operation. The USB transmitter/receiver is further operable to allow the register write sequence to complete if the STP signal and the DIR signal are not asserted during a predetermined period of the register write sequence.