Patents by Inventor Morgan S. McGuire

Morgan S. McGuire has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11784906
    Abstract: A display device for measuring the end-to-end latency of a computing system. The computing system includes an input device, a computing device, and the display device. The display device is directly connected with the input device and receives input data packets generated by the input device in response to received user input events. The display device passes the input packets to the computing device for graphics processing. The display device measures the end-to-end latency comprising the sum of three latencies. A first latency comprises an input delay of the input device. A second latency comprises an amount of time between generation of the input packet and a corresponding change in pixel values caused by the input event at the display device. A third latency comprises a display latency. The display device also displays latency information associated with the measured end-to-end latency.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: October 10, 2023
    Assignee: NVIDIA Corporation
    Inventors: Joohwan Kim, Benjamin Boudaoud, Josef B. Spjut, Morgan S. McGuire, Seth P. Schneider, Rouslan L. Dimitrov, Lars Nordskog, Cody J. Robson, Sau Yan Keith Li, Gerrit Ary Slavenburg, Tom J. Verbeure
  • Publication number: 20210243101
    Abstract: A display device for measuring the end-to-end latency of a computing system. The computing system includes an input device, a computing device, and the display device. The display device is directly connected with the input device and receives input data packets generated by the input device in response to received user input events. The display device passes the input packets to the computing device for graphics processing. The display device measures the end-to-end latency comprising the sum of three latencies. A first latency comprises an input delay of the input device. A second latency comprises an amount of time between generation of the input packet and a corresponding change in pixel values caused by the input event at the display device. A third latency comprises a display latency. The display device also displays latency information associated with the measured end-to-end latency.
    Type: Application
    Filed: June 4, 2020
    Publication date: August 5, 2021
    Inventors: Joohwan Kim, Benjamin Boudaoud, Josef B. Spjut, Morgan S. McGuire, Seth P. Schneider, Rouslan L. Dimitrov, Lars Nordskog, Cody J. Robson, Sau Yan Keith Li, Gerrit Ary Slavenburg, Tom J. Verbeure
  • Patent number: 8745603
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: June 3, 2014
    Assignee: Google Inc.
    Inventors: Morgan S. McGuire, Christopher G. Demetriou, Brian K. Grant, Matthew N. Papakipos
  • Patent number: 8584106
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: November 12, 2013
    Assignee: Google Inc.
    Inventors: Matthew N. Papakipos, Brian K. Grant, Christopher G. Demetriou, Morgan S. McGuire
  • Publication number: 20130254783
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Application
    Filed: May 10, 2013
    Publication date: September 26, 2013
    Applicant: Google Inc.
    Inventors: Morgan S. McGuire, Christopher G. Demetriou, Brian K. Grant, Matthew N. Papakipos
  • Patent number: 8443349
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: May 14, 2013
    Assignee: Google Inc.
    Inventors: Matthew N. Papakipos, Brian K. Grant, Morgan S. McGuire, Christopher G. Demetriou
  • Patent number: 8443348
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: May 14, 2013
    Assignee: Google Inc.
    Inventors: Morgan S. McGuire, Christopher G. Demetriou, Brian K. Grant, Matthew N. Papakipos
  • Publication number: 20120144158
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Application
    Filed: February 9, 2012
    Publication date: June 7, 2012
    Inventors: Matthew N. Papakipos, Brian K. Grant, Christopher G. Demetriou, Morgan S. McGuire
  • Publication number: 20120144162
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Application
    Filed: February 9, 2012
    Publication date: June 7, 2012
    Inventors: Matthew N. Papakipos, Brian K. Grant, Morgan S. McGuire, Christopher G. Demetriou
  • Patent number: 8136102
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: March 13, 2012
    Assignee: Google Inc.
    Inventors: Matthew N. Papakipos, Brian K. Grant, Christopher G. Demetriou, Morgan S. McGuire
  • Patent number: 8136104
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: March 13, 2012
    Assignee: Google Inc.
    Inventors: Matthew N. Papakipos, Brian K. Grant, Morgan S. McGuire, Christopher G. Demetriou
  • Publication number: 20070294663
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Application
    Filed: March 5, 2007
    Publication date: December 20, 2007
    Inventors: Morgan S. McGuire, Christopher G. Demetriou, Brian K. Grant, Matthew N. Papakipos
  • Publication number: 20070294666
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Application
    Filed: March 5, 2007
    Publication date: December 20, 2007
    Inventors: Matthew N. Papakipos, Brian K. Grant, Morgan S. McGuire, Christopher G. Demetriou
  • Publication number: 20070294680
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Application
    Filed: March 5, 2007
    Publication date: December 20, 2007
    Inventors: Matthew N. Papakipos, Brian K. Grant, Christopher G. Demetriou, Morgan S. McGuire
  • Patent number: 6598186
    Abstract: A system and method create and manipulate variables having both a numeric value and a units designation. The units designation is a vector of unit exponents which are operated upon consistent with operations on values. Exactly defined and underdefined quantities are stored in data structures of values and unit designations. Operations on underdefined quantities may result in expression data structures of operand quantities, operators and unit designations. The system allows the creation of variables having a unit specification and the transparent manipulation of such a variable during conventional numerical and logical operations. The system automatically signals an error condition when an operation is attempted on a set of variables having incompatible units designations. Error conditions can be detected at both compile-time and run-time. The system also includes both a predetermined dictionary of units and a customizable dictionary of units.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: July 22, 2003
    Assignee: Curl Corporation
    Inventors: Morgan S. McGuire, Mathew J. Hostetter
  • Patent number: 6266452
    Abstract: A method for registering a pattern image with a reference image is provided. The pattern image and the reference image differ from each other by a Rotation-Scale-Translation (RST) transformation defined by a scale factor s, a rotation factor &phgr;, and a translation vector (&Dgr;x, &Dgr;y). A Fourier-Mellin invariant is used to perform image registration by isolating the rotation, scale and transformation parameters of the RST transformation between the reference image r and the pattern image p.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: July 24, 2001
    Assignee: NEC Research Institute, Inc.
    Inventor: Morgan S. McGuire