Abstract: Motion compensated video signal processing apparatus comprises a subsampler for horizontally subsampling an input digital video signal, to generate a subsampled video signal; a motion vector processor for generating motion vectors from the subsampled video signal; and a motion compensated video processor for processing the input digital video signal according to the motion vectors, to generate an output digital video signal.

Abstract: Motion compensated video signal processing apparatus for interpolating an output image of an output video signal from a corresponding pair of temporally adjacent input images of an input video signal comprises: means for generating a plurality of local motion vectors to represent image motion of respective search blocks of one input image of the pair between that image and the other image of the pair; means for detecting blocks of the output image pointed to by each local motion vector; means for assigning a group of motion vectors to each block of the output image, the group being selected from a set of motion vectors comprising at least those local motion vectors pointing to that block of the output image; and a motion compensated interpolator for interpolating pixels of each block of the output image from the pair of input images, using a motion vector from the group assigned to that block.

Abstract: Motion compensated video signal processing apparatus, in which motion vectors are generated to represent image motion between a pair of input images of an input video signal, comprises means for comparing search blocks within one of the pair of input images with respective search areas, comprising a plurality of blocks, in the other of the pair of input images, to generate a first plurality of original correlation surfaces, each comprising an array of correlation values representing correlation between the respective search block and search area; means for generating a second plurality of interpolated correlation surfaces by interpolation from the original correlation surfaces; and means for generating a respective motion vector from each interpolated correlation surface, in dependence on a point of maximum correlation in that interpolated correlation surface.

Abstract: A method of processing a digital video signal to derive motion vectors representing motion between successive fields or frames of the video signal comprises compares the contents of blocks of pixels in a first field or frame of the video signal with the contents of a plurality of blocks of pixels in a following field or frame, and produces for each block in the first field or frame a correlation surface representing the difference between the contents so compared in the two fields or frames. A grown correlation surface is produced for each block in the first field or frame by weighting the correlation surfaces for that block and a plurality of other blocks in an area around that block so as to accentuate features of the correlation surface for that block relative to those for the other blocks, and summing the weighted correlation surfaces.

Abstract: In order to simulate, on set or on location, a subsequent video to film conversion process, an input interlaced video signal is converted in any of a variety of ways to a progressive scan format video signal, and then interlaced fields of the progressive scan format frames are displayed on a video monitor or view finder.

Abstract: A motion compensation technique for color video signals involves deriving at least one principal component from the video signals by means of a hotelling transform circuit and a matrix, and applying motion compensation to an interpolator (or to a compressor/decompressor) on the basis of the derived principal component. The technique avoids the need to provide three separate compensation circuits for each of the video signals while ensuring that optimum use is made of the color information in the video signals.

Abstract: An input digital video signal representing a series of input frames with at least some of the input frames each having a first picture portion having a first acquisition characteristic (such as 60 Hz, 2:1) and a second picture portion having a second acquisition characteristic (such as 30 Hz, 1:1) is processed to produce an output video signal representing a series of output frames having generally the same acquisition characteristic (such as 24 Hz, 1:1). The method comprises the steps of distinguishing between the first and second picture portions in the input frames (for example by determining the difference between input fields (a.sub.1, a.sub.2 ; a.sub.3, a.sub.4 ; . . . ) of a pair, or by detecting a key signal accompanying the input video signal) and processing the first and second picture portions differently to produce the output frames.

Abstract: A system for integrating film material with a digital video signal employs a film scanner to produce a digital video signal from the source film, and a post production system for combining with that signal the input digital video signal. Motion interpolated temporal compensation is employed at stages of frame rate conversion.

Abstract: A system for integrating film material with a digital video signal employs a film scanner to produce a digital video signal from the source film, and a post production system for combining with that signal the input digital video signal. Motion interpolated temporal compensation is employed at stages of frame rate conversion.

Abstract: Method of integrating 30 or 60 frame/s format material and 60 field/s 2:1 interlace scan format digital video signal to produce a 60 field/s 2:1 interlace scan format digital video signal by producing a progressive scan format digital video signal from the format material, converting the progressive scan format digital video signal to a 60 field/s 2:1 interlace scan format digital video signal and combining the converted signal with the 60 field/s interlace scan format digital video signal.

Abstract: A video image capture apparatus including an image sensor for sensing light at a plurality of pixel positions received via an optical system, picture storage means for temporarily storing pixels derived from the image sensor, address generation means for applying differing write and read addresses to the picture storage to effect mapping of input pixels from the image sensor to provide output pixels compensating for the effects of imperfections of the optical system is described. A video camera producing high quality output images for instance can thereby be produced.

Abstract: A two-dimensional finite impulse response (FIR) filter comprises a demultiplexer for demultiplexing an input data signal comprising adjacent digital words into p (e.g. 2) slower data signals each having a slower rate equal to 1/p (e.g. 1/2) of the data rate of the input signal and each comprising every p.sup.th (e.g. every alternate) word of the input signal. The slower data signals are passed to p (e.g. 2) filter portions each comprising a horizontal FIR filter and a vertical FIR filter. The horizontal filters are each connected to receive all of the slower data signals and all of them are operative simultaneously to effect horizontal filtration by periodically processing sets of adjacent words of the input signal, the sets of adjacent words being processed at any one time by the respective horizontal filters being offset with respect to one another by one word.

Abstract: A video signal memory which may form a field memory in a special effects equipment of a high definition video system, provides storage of n.sup.2 m video data words and includes an array of n by n memory modules each capable of storing m video data words corresponding respectively to sample values at respective sample positions of a raster display, a first group of n buses for supplying data and address signals to the n columns respectively of the array, a second group of n buses for supplying data and address signals to the n rows respectively of the array, and means selectively to enable the first or second group of buses in each write cycle of the video signal memory and in the write cycle to supply over the enabled group of buses up to n data and address signals wherein the address designates the address in a memory module in the corresponding column or row of the array and the data is the data to be stored in the memory module.

Abstract: A two-dimensional finite impulse response filter arrangement for filtering a signal which represents an image and which comprises a sequence of digital words comprises a two-dimensional finite impulse response filter operative during each of a plurality of successive clock periods to effect filtration over a predetermined area of the image by multiplying each of a set of the digital words in a spatial array by a respective weighting coefficient in a corresponding set of weighting coefficients, and summing the resulting products to produce therefrom an output filtered digital word.

Abstract: A two-dimensional finite impulse response (2D-FIR) filter arrangement includes a 2D-FIR filter (26,30,32,34) operative during each of successive clock periods equal to T (where T is the spacing of digital samples or words of an image signal) to effect filtration over a predetermined area of the image by processing n.times.m words of the signal, having a predetermined spatial relationship in the form of an array, to produce an intermediate word. Some of the intermediate words are stored in a partial products store (28). A controller (60) is responsive to a signal (HCF,VCF) indicating an extent to which the image is to be compressed to do two things. First, it causes the FIR filter (26,30,32,34) to adopt a bandwidth which is reduced, with respect to a value for zero compression, by an extent related to the extent of compression. This reduces or prevents aliasing that otherwise would be caused by the compression operation.

Abstract: Digital video sample values from a first sample domain are mapped to a second sample domain using a mapping function which involves a change in image size, for example, for a digital video effects unit. The apparatus comprises an address generator and a processor for computing, for each sample position in the second sample domain, the position of a point in the first sample domain which, using the mapping function, would map onto that sample position in the second sample domain, and an interpolator for obtaining from available input sample values an interpolated sample value for that point in the first sample domain, the interpolated sample value being used as the sample value for the sample position in that second sample domain.

Abstract: A video signal memory which may, for example, form a field memory in a special effects equipment of a high definition video system, provides storage for n.sup.2 m video data words and has n.sup.2 memory modules each capable of storing m video data words corresponding respectively to sample values at respective sample positions of a raster display, each memory module being arranged to store one only of the video data words in any square of n by n sample positions of the raster in any one write cycle, and means to write up to n video data words corresponding to n adjacent collinear sample positions of the raster in the video memory in any one write cycle.

Abstract: An image signal processing apparatus comprises a memory (12) and an address generator (14) that generates addresses for allocation to successive words of a digital input signal (10) representing an input image for mapping those words (or words obtained by interpolation therefrom) into the memory (12) in such a manner that individual portions of the mapped image stored in the memory may be compressed and/or rotated with respect to corresponding portions of the input image. A digital filter (40) of variable bandwidth effects two-dimensional filtering of the image before it is stored in the memory (12). Local scaling factor computation means (42) monitors the addresses allocated by the address generator (14) to successive sets of words of the input signal corresponding to successive local image areas and computes from each set of addresses, for the corresponding set of words, a local scaling factor representing the extent of compression and/or rotation of the local area.

Abstract: A signal interpolator for time base expanding a portion of an input sample signal of given sample rate by deriving, from the input sample values, interpolated output sample values at that sample rate, the signal interpolator comprising an address generator comprising an address counter for supplying a sequence of initial sample position addresses at that sample rate and corresponding to input sample values in the input sample signal, and a device for deriving, from the initial addresses, a modified sequence of sample position addresses at that sample rate, the modified sequence containing address repetitions corresponding to the required degree of expansion, and also for deriving residual signals corresponding to subdivisions of the intervals between successive different addresses in the modified sequence, and an interpolator for deriving each interpolated output sample value in dependence on the value of the residual signal and of a respective corresponding group of the input sample values.

Abstract: A video signal processing circuit receiving an input sample data relating to sample positions in a video field and in association with the sample data for each sample position associated z data indicating the apparent position of the sample data in a direction perpendicular to a video display of the video field, a first memory for storing the sample data relating to each sample position in the video field, a second memory for storing the z data relating to each sample position in the video field, and a comparator circuit for comparing for each sample position in the video field the value of the input said data with the z data for that sample position stored in the second memory and for supplying a write enable signal only if the value of the input z data represents a sample position in front of that represented by the stored data, the input sample data being written into the first memory and the new z data being written into the second memory under control of a write enable signal.