Abstract: A method for preparing a monodomain thin layer of ferroelectric material comprises: implanting light species in a ferroelectric donor substrate in order to form an embrittlement plane and to define a first layer therein; assembling the donor substrate with a support substrate by means of a dielectric assembly layer; and fracturing the donor substrate at the embrittlement plane. The dielectric assembly layer comprises an oxide having a hydrogen concentration lower than that of the first layer or preventing the diffusion of hydrogen to the first layer, or the dielectric assembly layer comprises a barrier preventing the diffusion of hydrogen to the first layer. A heat treatment of a free face of the first layer is used to diffuse the hydrogen contained therein and cause the multidomain transformation of a surface portion of this first layer, followed by a thinning of the first layer in order to remove the surface portion.

Abstract: A method for manufacturing a structure comprising a thin layer transferred onto a support provided with a charge trapping layer, the method comprising the following steps: —preparing the support comprising forming the trapping layer on a base substrate, the trapping layer having a hydrogen concentration of less than 10{circumflex over (?)}18 at/cm{circumflex over (?)}; —joining the support to a donor substrate by way of a dielectric layer having a hydrogen concentration of less than 10{circumflex over (?)}20 at/cm{circumflex over (?)}3 or comprising a barrier preventing the diffusion of hydrogen toward the trapping layer or having low hydrogen diffusivity; —removing part of the donor substrate to form the thin layer; the manufacturing method exposing the structure to a temperature below a maximum temperature of 1000° C. The present disclosure also relates to a structure obtained at the end of this method.

Abstract: A method for manufacturing a plurality of crystalline semiconductor islands having a variety of lattice parameters includes the following steps: providing a relaxation substrate that comprises a medium, a flow layer disposed on the medium and, a plurality of strained crystalline semiconductor islands having an initial lattice parameter located on the flow layer, a first group of islands having a first lattice parameter and a second group of islands having a second lattice parameter that is different from the first; and heat treating the relaxation substrate at a relaxation temperature greater than or equal to the glass transition temperature of the flow layer to cause differentiated lateral expansion of the islands of the first and second group. The lattice parameter of the relaxed islands of the first group and the relaxed islands of the second group then have different values.

Abstract: A growth substrate for forming optoelectronic devices comprises a growth medium and, arranged on the growth medium, a first group of crystalline semiconductor islands having a first lattice parameter and a second group of crystalline semiconductor islands having a second lattice parameter that is different from the first. Methods may be used to manufacture such growth substrates. The methods may be used to provide a monolithic micro-panel or light-emitting diodes or a micro-display screen.

Abstract: A method for manufacturing a plurality of crystalline semiconductor islands having a variety of lattice parameters includes the following steps: providing a relaxation substrate that comprises a medium, a flow layer disposed on the medium and, a plurality of strained crystalline semiconductor islands having an initial lattice parameter located on the flow layer, a first group of islands having a first lattice parameter and a second group of islands having a second lattice parameter that is different from the first; and heat treating the relaxation substrate at a relaxation temperature greater than or equal to the glass transition temperature of the flow layer to cause differentiated lateral expansion of the islands of the first and second group. The lattice parameter of the relaxed islands of the first group and the relaxed islands of the second group then have different values.

Abstract: The invention relates to a method for manufacturing a semiconductor substrate by providing a seed support layer and a handle support layer, forming at least one semiconductor layer, in particular of a Group III/V-semiconductor material, over the seed support layer, wherein the at least one semiconductor layer is in a strained state, forming a bonding layer over the at least one semiconductor layer, forming a bonding layer over the handle support layer, and bonding the seed and handle substrates together to obtain a donor-handle compound, by direct bonding between the bonding layer of the seed substrate and the bonding layer of the handle substrate. At least one of the bonding layer of the seed substrate and the bonding layer of the handle substrate includes a silicon nitride.

Abstract: A polishing method for a heterostructure of at least one relaxed superficial heteroepitaxial layer on a substrate made of a different material. The method includes a first chemical mechanical polishing step of the surface of the heteroepitaxial layer performed with a polishing cloth having a first compressibility ratio and with a polishing solution having a first silica particle concentration. The first chemical mechanical polishing step is followed by a second chemical mechanical polishing step of the surface of the heteroepitaxial layer, with the second step being performed with a polishing cloth having a second compressibility ratio, higher than the first compressibility ratio, and with a polishing solution having a second silica particle concentration, lower than the first concentration. By this method, improved surface roughness is achieved.