Patents by Inventor Moriaki Akazawa
Moriaki Akazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7927187Abstract: A circular polishing pad has grooves formed on the surface in a spiral pattern with its center point offset from the center of the pad. The spiral pattern is an Archimedean spiral pattern or a parabolic spiral pattern. A target object is polished by using such a polishing pad without oscillating the platen to which the polishing pad is pasted or the polishing head that holds the target object.Type: GrantFiled: May 23, 2008Date of Patent: April 19, 2011Assignee: NIHON Micro Coating Co., Ltd.Inventors: Jun Watanabe, Tetsujiro Tada, Takashi Arahata, Jun Tamura, Moriaki Akazawa, Masaru Sakamoto, Takahiko Kawasaki
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Publication number: 20080293332Abstract: A circular polishing pad has grooves formed on the surface in a spiral pattern with its center point offset from the center of the pad. The spiral pattern is an Archimedean spiral pattern or a parabolic spiral pattern. A target object is polished by using such a polishing pad without oscillating the platen to which the polishing pad is pasted or the polishing head that holds the target object.Type: ApplicationFiled: May 23, 2008Publication date: November 27, 2008Applicant: NIHON MICRO COATING CO., LTD.Inventors: Jun Watanabe, Tetsujiro Tada, Takashi Arahata, Jun Tamura, Moriaki Akazawa, Masaru Sakamoto, Takahiko Kawasaki
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Patent number: 6603163Abstract: A semiconductor device having a capacitor and a method of manufacturing thereof are provided, securing a certain capacitance while allowing the size to be reduced. The semiconductor device includes a capacitor lower electrode having an upper surface and including a metal film, a dielectric film deposited on the upper surface of the capacitor lower electrode and having its thickness smaller than that of the capacitor lower electrode, and a capacitor upper electrode deposited on the dielectric film, having its width smaller than that of the capacitor lower electrode and including a metal film.Type: GrantFiled: May 17, 2001Date of Patent: August 5, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Katsunobu Hori, Takeshi Matsunuma, Kenichiro Shiozawa, Moriaki Akazawa
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Patent number: 6586329Abstract: A contact hole having an opening diameter smaller than the minimum dimension that can be formed by photolithographic technique is formed. Using an interlayer insulating film 8 formed on a semiconductor substrate as an etching mask, etching is carried out halfway to form an opening 8a. The etching mask is removed, and a TEOS film 10 is formed on the interlayer oxide film 8. The whole surface is then etched anisotropically to form a contact hole 11.Type: GrantFiled: April 6, 2000Date of Patent: July 1, 2003Assignee: Mitsubishi Denki Kabshiki KaishaInventors: Yoshinori Tanaka, Mitsuya Kinoshita, Shinya Watanabe, Tatsuo Kasaoka, Moriaki Akazawa, Toshiaki Ogawa
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Publication number: 20030067053Abstract: A semiconductor device having a capacitor and a method of manufacturing thereof are provided, securing a certain capacitance while allowing the size to be reduced. The semiconductor device includes a capacitor lower electrode having an upper surface and including a metal film, a dielectric film deposited on the upper surface of the capacitor lower electrode and having its thickness smaller than that of the capacitor lower electrode, and a capacitor upper electrode deposited on the dielectric film, having its width smaller than that of the capacitor lower electrode and including a metal film.Type: ApplicationFiled: October 30, 2002Publication date: April 10, 2003Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Katsunobu Hori, Takeshi Matsunuma, Kenichiro Shiozawa, Moriaki Akazawa
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Publication number: 20020076894Abstract: A semiconductor device having a capacitor and a method of manufacturing thereof are provided, securing a certain capacitance while allowing the size to be reduced. The semiconductor device includes a capacitor lower electrode having an upper surface and including a metal film, a dielectric film deposited on the upper surface of the capacitor lower electrode and having its thickness smaller than that of the capacitor lower electrode, and a capacitor upper electrode deposited on the dielectric film, having its width smaller than that of the capacitor lower electrode and including a metal film.Type: ApplicationFiled: May 17, 2001Publication date: June 20, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Katsunobu Hori, Takeshi Matsunuma, Kenichiro Shiozawa, Moriaki Akazawa
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Patent number: 6097052Abstract: A contact hole having an opening diameter smaller than the minimum dimension that can be formed by photolithographic technique is formed. Using an interlayer insulating film 8 formed on a semiconductor substrate as an etching mask, etching is carried out halfway to form an opening 8a. The etching mask is removed, and a TEOS film 10 is formed on the interlayer oxide film 8. The whole surface is then etched anisotropically to form a contact hole 11.Type: GrantFiled: June 25, 1997Date of Patent: August 1, 2000Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yoshinori Tanaka, Mitsuya Kinoshita, Shinya Watanabe, Tatsuo Kasaoka, Moriaki Akazawa, Toshiaki Ogawa
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Patent number: 5474615Abstract: A method of cleaning semiconductor devices which removes or transmutes the contaminants sticking on sidewalls of a pattern or a trench is formed is disclosed. A substrate to be treated on which a pattern or a trench is formed is located in a processing container. A reactive gas which reacts with the contaminants sticking on the sidewall of the pattern or the trench to produce reactive ions which remove or transmute the contaminants is introduced into the processing container. Plasma of the reactive gas is produced by electronic cyclotron resonance in order to produce reactive ions from the reactive gas introduced into the processing container. According to the method, the temperature of the reactive ions in the plasma becomes high, with the result that the motion of the reactive ions in the plasma becomes more active.Type: GrantFiled: December 17, 1992Date of Patent: December 12, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Tomoaki Ishida, Kenji Kawai, Moriaki Akazawa, Takahiro Maruyama, Toshiaki Ogawa
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Patent number: 5306671Abstract: A principal feature of the present invention is to clean a surface of a semiconductor substrate without providing a damaged layer to the surface thereof. A native oxide film formed on the surface of a silicon substrate is etched by plasma employing a gas containing fluorine. The surface of the semiconductor substrate is again subjected to plasma etching by employing a gas containing fluorine in order to remove a surface damaged layer and a fluorocarbon layer formed in the above step of plasma etching. The semiconductor substrate surface is irradiated with ultraviolet rays under a low pressure in order to dissociate and remove fluorine atoms chemically adsorbed to the semiconductor substrate surface upon the latter plasma etching.Type: GrantFiled: June 21, 1991Date of Patent: April 26, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Toshiaki Ogawa, Hiroshi Morita, Tomoaki Ishida, Kenji Kawai, Moriaki Akazawa
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Patent number: 5302541Abstract: A semiconductor device includes a second insulator layer (12) a first conductor layer (13) and a second insulator layer (14) stacked in this order on a semiconductor substrate (11), and a trench (15) formed to penetrate the stacked triple layer and extend into the semiconductor substrate. A capacitor is formed at a portion of the trench located in the semiconductor substrate. A transistor is formed directly on this capacitor. The capacitor has one electrode formed of the semiconductor substrate and the other electrode formed of a second conductor layer (18) formed in the trench to open a dielectric film (17). The transistor includes a gate electrode formed of the first conductor layer and source/drain regions (20, 21) of a second conductivity type distributed in the vicinity of the first and second insulator layers in an active layer (19) filling the trench.Type: GrantFiled: February 16, 1993Date of Patent: April 12, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Moriaki Akazawa
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Patent number: 5223085Abstract: A method for anisotropically etching a substrate to be treated using plasma of a reactive gas produced by electron cyclotron resonance is disclosed. A substrate to be treated is located in a processing container, and a chlorine gas and a hydrogen chloride gas are introduced into the processing container. From the mixture of the chlorine and hydrogen chloride gases introduced into the processing container, plasma of the mixed gas is produced by electron cyclotron resonance. According to this method, the energy of the plasma of chlorine is taken by the plasma of H.sup.+, which results in a decrease in kinetic energy of the chlorine. As a result, the plasma of chlorine impinges vertically to the substrate to be treated along the sheath electric field. Consequently, etching with strong anisotropic property is enabled.Type: GrantFiled: February 12, 1991Date of Patent: June 29, 1993Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kenji Kawai, Moriaki Akazawa, Takahiro Maruyama, Toshiaki Ogawa, Hiroshi Morita
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Patent number: 5218218Abstract: A semiconductor device includes a second insulator layer (12), a first conductor layer (13) and a second insulator layer (14) stacked in this order on a semiconductor substrate (11), and a trench (15) formed to penetrate the stacked triple layer and extend into the semiconductor substrate. A capacitor is formed at a portion of the trench located in the semiconductor substrate. A transistor is formed directly on this capacitor. The capacitor has one electrode formed of the semiconductor substrate and the other electrode formed of a second conductor layer (18) formed in the trench to open a dielectric film (17). The transistor includes a gate electrode formed of the first conductor layer and source/drain regions (20, 21) of a second conductivity type distributed in the vicinity of the first and second insulator layers in an active layer (19) filling the trench.Type: GrantFiled: June 5, 1992Date of Patent: June 8, 1993Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Moriaki Akazawa
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Patent number: 5203981Abstract: A vacuum-treatment apparatus employs a magnetically driven clamp which uses repulsive and attractive forces between magnets. The clamp mechanism is simplified, maintenance of the apparatus can be easily performed, and the surfaces which mechanically contact one another are decreased as much as possible so that a vacuum-treatment apparatus which generates less dust is obtained.Type: GrantFiled: February 14, 1992Date of Patent: April 20, 1993Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Moriaki Akazawa
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Patent number: 5038013Abstract: A plasma etching apparatus comprises a chamber, a holding table for holding samples, such as a semiconductor substrate to be etched, in the chamber, a plasma-generating device for generating a plasma within the chamber, and a magnetic-field-forming device which forms a magnetic field perpendicular to the surface of the sample placed on the holding table and parallel the inner wall of the chamber.Type: GrantFiled: August 3, 1990Date of Patent: August 6, 1991Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Moriaki Akazawa, Takahiro Maruyama, Toshiaki Ogawa, Hiroshi Morita, Tomoaki Ishida
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Patent number: 4982138Abstract: A wafer treating device utilizing a plasma generated by a gas discharge caused by electron cyclotron resonance (ECR) includes a wafer treating chamber and a plasma generating chamber, a microwave supply for supplying microwave energy to the plasma generating chamber, and an electromagnetic coil which surrounds the plasma generating chamber to produce a minimum B-field therein. A plasma generated in the plasma generating chamber by electron cyclotron resonance is confined stably therein by the minimum B-field produced by the coil. Thus, the density and stability of the plasma in the plasma generating chamber are enhanced. The plasma in the plasma generating chamber is conveyed to a wafer in the wafer treating chamber along the diverging lines of a magnetic force. Examples of the minimum B-field producing coil include Ioffe bars, a baseball coil and an Yin-yang coil.Type: GrantFiled: November 29, 1988Date of Patent: January 1, 1991Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Nobuo Fujiwara, Kenji Kawai, Moriaki Akazawa, Teruo Shibano, Tomoaki Ishida, Kyusaku Nishioka
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Patent number: 4915979Abstract: A semiconductor wafer treating device utilizing a gas plasma generated by electron cyclotron resonance (ECR) is disclosed whch comprises a wafer treating chamber and a plasma generating chamber communicating with the wafer treating chamber. Microwave energy at a frequency of not more than 2 GHz and not less than 100 MHz is supplied to the plasma generating chamber which is surrounded by a solenoidal coil and produces a magnetic field in the plasma generating chamber and in the wafer treating chamber to produce ECR and transport the plasma generated by ECR to the wafer. Thus, the Larmor radius of the electrons moving in helical paths in electron cyclotron resonance in the plasma generating chamber is optimized to make the plasma spatially uniform. Consequently, the uniformity of the treatment on the wafer is improved.Type: GrantFiled: December 2, 1988Date of Patent: April 10, 1990Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Tomoaki Ishida, Nobuo Fujiwara, Kyusaku Nishioka, Moriaki Akazawa, Teruo Shibano, Kenji Kawai