Patents by Inventor Morio Inoue

Morio Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5476006
    Abstract: Crystal evaluation apparatus is disclosed which includes a cell region having an anode and a cathode, a reservoir tank for supplying of an aqueous solution for forming an anodic oxide film in the cell region, a reservoir tank for supplying of an aqueous solution for removing the anodic oxide film and a scanning microprobe microscope having a scanning microprobe, installed inside the cell region. A crystal evaluation method is also disclosed which contains anodic oxidation on a semiconductor substrate, removal of an anodic oxide film developed. The semiconductor substrate is observed with a scanning probe microscope having a scanning microprobe. The oxide film is formed on the semiconductor substrate by the anodic oxidation method and then removed by a mixture of hydrofluoric acid and ammonium fluoride. The anodic oxidation method exerts no or little physical impact on the substrate.
    Type: Grant
    Filed: July 7, 1993
    Date of Patent: December 19, 1995
    Assignee: Matsushita Electronics Corporation
    Inventors: Shingi Fujii, Genshu Fuse, Morio Inoue
  • Patent number: 4933263
    Abstract: Disclosed is a method of forming a resist pattern by exposing a novolak type positive photoresist to ultraviolet light in a pattern, irradiating the entire surface with far ultraviolet light with wavelength of 200 to 320 nm in an atmosphere with inert gas partial pressure ratio of 90% or more, and developing it. According to this method, a specific gradient of solubility in developing solution becoming higher from the surface toward the depthwise direction is provided, and a contrast value of twice as high as in the conventional method can be obtained, and a resist pattern of high aspect ratio is formed.
    Type: Grant
    Filed: February 17, 1988
    Date of Patent: June 12, 1990
    Assignee: Matsushita Electronics Corporation
    Inventors: Yoshimitsu Okuda, Morio Inoue, Yukio Takashima, Tohru Ohkuma
  • Patent number: 4795720
    Abstract: Herein disclosed are a method of producing a semiconductor device. Especially in a device constructed to have a defective circuit replaced by a redundant circuit, after a fuse is cut by exposure to a laser beam, a portion to be fused is irradiated in a predetermined gas atmosphere with an optical ray to selectively form a CVD film thereby to form a protection film over the fuse so that the formation of the protection film is simplified after the fuse is cut, whereby any rise in the production cost is suppressed while improving the production yield and reliability.
    Type: Grant
    Filed: September 14, 1987
    Date of Patent: January 3, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Takao Kawanabe, Morio Inoue, Mikio Hongo
  • Patent number: 4436482
    Abstract: A method of controlling the speed of a ship equipped with a controllable pitch propeller at a predetermined value. A desired horsepower corresponding to a desired ship speed is obtained in accordance with the actual horsepower, the detected ship speed value and the preset ship speed value, and the rpm of the main engine is controlled in accordance with the desired rpm obtained in accordance with an engine loading function generator for minimum fuel consumption obtained in accordance with predetermined engine loading function generator for optimum propeller efficiency and a designed load characteristic function and the desired horsepower. A desired fuel rack position is obtained in accordance with the desired rpm and the desired horsepower and the desired fuel rack position is compared with the actual fuel rack position so as to control the blade angle of the propeller.
    Type: Grant
    Filed: September 17, 1981
    Date of Patent: March 13, 1984
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Morio Inoue, Satoshi Hoshino, Hideki Namura, Takashi Watari
  • Patent number: 4268327
    Abstract: A method for growing semiconductor epitaxial layers for manufacturing semiconductor devices such as light emitting diodes, characterized byusing a single tub for containing a solution comprising solvent solute and additive, andafter growing a first epitaxial layer growth by contacting the solution to a semiconductor substrate, evacuating the space in a container containing said semiconductor substrate and said solution tub, thereby removing at least a part of said additive.
    Type: Grant
    Filed: January 7, 1980
    Date of Patent: May 19, 1981
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tamotsu Uragaki, Morio Inoue, Susumu Koike, Hitoo Iwasa
  • Patent number: 4255755
    Abstract: A semiconductor laser is made by sequential liquid-phase epitaxial growths on an n-type GaAs substrate, thereby sequentially forminga first layer of n-type GaAlAs,a second layer of n-type or p-type GaAs as active region,a third layer of p-type GaAlAs,said first to third layers forming a doublehetero structure,a fourth layer of p.sup.+ -type GaAs, anda fifth layer of n-type GaAlAs,by chemically etching the fifth layer, to form a groove or narrow window therein so as to expose a part of said fourth layer at the bottom of the groove, andby providing a metal electrode embedded in said groove.In the laser of the abovementioned construction, the fifth layer, instead of the conventional oxide film, serves as an isolation layer. However, the fifth layer, being an epitaxially grown GaAlAs layer, has better thermal conductivity than an oxide film.
    Type: Grant
    Filed: December 13, 1978
    Date of Patent: March 10, 1981
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kunio Itoh, Morio Inoue
  • Patent number: 4193835
    Abstract: When a highly resistive GaAs film doped with a metal impurity such as Fe, Ni or Cr is epitaxially grown from the vapor phase, a metallocene of this metal impurity such as Fe(C.sub.5 H.sub.5).sub.2, Cr(C.sub.5 H.sub.5).sub.2 or Ni(C.sub.5 H.sub.5).sub.2 or a derivative of this metallocene is employed as a starting material of this impurity. Even at room temperature or a temperature lower than room temperature a metallocene or a derivative thereof has such a high vapor pressure as to permit the epitaxial growth of a semi-insulating film so that heating of a line for feeding an impurity into a reaction tube may be eliminated and consequently an epitaxial system may be much simplified. Furthermore introduction of the impurity into the reaction tube may be instantaneously started or stopped by opening or closing a stop valve inserted into the feed line so that the impurity distribution may be sharply changed from one semi-insulating epitaxially grown film to another.
    Type: Grant
    Filed: October 5, 1977
    Date of Patent: March 18, 1980
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Morio Inoue, Kunio Itoh, Kunihiko Asahi
  • Patent number: 4188244
    Abstract: In order to decrease threshold current of a semiconductor laser, and to obtain a single mode lasing suitable for use in light-communication, the semiconductor laser is formed in stripe type in which the light-emitting (i.e., active) layer and neighboring layers are formed in mesa-etched stripe type and low impurity-concentration (i.e., high resistivity) layers of GaAs, GaAsP or GaAlAs are situated to contact the mesa-etched side faces of the stripe-shaped part on the semiconductor device by vapor phase growth, vacuum deposition, sputtering, or molecular beam deposition. Since the wafer temperature can be kept fairly low (e.g. 400.degree.-700.degree. C.) in comparison with that (about 950.degree. C.) in a liquid phase growth, the stress introduced during the deposition is smaller than that in a liquid phase growth.
    Type: Grant
    Filed: October 2, 1978
    Date of Patent: February 12, 1980
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kunio Itoh, Morio Inoue
  • Patent number: 4149175
    Abstract: A mesa region of a stripe geometry is formed by mesa-etching a surface of a GaAs crystal substrate, forming a crystal layer of higher resistivity than the abovementioned crystal substrate so as to fill the abovementioned mesa-etched recesses in a manner that the stripe shaped mesa region is buried in the higher resistivity regions making top faces of the mesa region and the higher resistivity regions flush with each other, then forming, on the abovementioned flush surface, several epitaxial growth regions of semiconductor crystal including a light emitting region, for instance, an active region for lasing, subsequently forming contact isolation region having an opening of the stripe geometry corresponding to and above said mesa region. The current flow in the active region is confined in a narrow stripe region.
    Type: Grant
    Filed: January 30, 1978
    Date of Patent: April 10, 1979
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Morio Inoue, Kunio Itoh, Kunihiko Asahi
  • Patent number: 4144503
    Abstract: In a semiconductor laser with light guide, wherein an active region to form the Fabry-Perot cavity is formed in a mesa part on a semiconductor substrate and mixed crystal semiconductor parts formed to fill the mesa-etched parts constitute light guides. The improvement is that a crystal semiconductor of the active region has the composition of Ga.sub.1-x Al.sub.x As (0.ltoreq.x<1) and a mixed crystal of the light guide has the composition of GaAs.sub.1-y P.sub.y (0<y<1) or Ga.sub.1-z Al.sub.z As (0<x<z<1) of sufficiently high (for instance, 10.sup.4 .OMEGA.cm) specific resistivity with respect to that of the active region, the value of y or z being selected to be smallest at a depth of the light guide where the lasing light is incident, and the energy gap of the mixed crystal part being selected to be larger than that of said active region, so that light loss in the light guide is decreased.
    Type: Grant
    Filed: December 2, 1976
    Date of Patent: March 13, 1979
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kunio Itoh, Morio Inoue
  • Patent number: 4080245
    Abstract: When gallium phosphide is etched with hot phosphoric acid from the surface of a crystal having a (1 1 1) plane, the etched surface becomes a flat and smooth plane inclined at an angle of 45.degree. to 55.degree. to the (1 1 1) plane. Accordingly, when an electroluminescent diode is manufactured by forming a p-n junction on a gallium phosphide crystal having a (1 1 1) plane and etching the crystal with a hot concentrated phosphoric acid etching solution to form a mesa structure, the side faces of the resulting crystal becomes inclined to the plane of the junction at an angle of nearly 45.degree. so that the visible rays generated in the p-n junction are totally reflected on the side faces, thus markedly increasing the intensity of emitted rays in the direction of the optical axis perpendicular to the principal plane of the p-n junction.
    Type: Grant
    Filed: June 14, 1976
    Date of Patent: March 21, 1978
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Haruyoshi Yamanaka, Tamotsu Uragaki, Shohei Fujiwara, Morio Inoue
  • Patent number: 4075652
    Abstract: The invention discloses a heterojunction Type GaAs field-effect transistor of the type in which a channel region consists of an n-type GaAs layer with a higher mobility and a gate region consists of a p-type Ga.sub.1-y Al.sub.y As layer which is grown heteroepitaxially. The length of the gate is of the order of microns, and a gate, source and drain electrodes are self-aligned. The gate region is etched in the form of a mushroom with the use of an etchant which etched the GaAlAs layer and the Ga-As layer at different etching rates so that the gate, source and drain electrodes may be formed by only one vacuum deposition of a metal such as aluminum.
    Type: Grant
    Filed: May 5, 1977
    Date of Patent: February 21, 1978
    Assignee: Matsushita Electronics Corporation
    Inventors: Shotaro Umebachi, Gota Kano, Morio Inoue
  • Patent number: 4034311
    Abstract: Double-hetero-structure injection laser can be improved to have low threshold current in room-temperature continuous-wave operation. The improvement is obtained in one case wherein an n-type Ga.sub.1.sub.-y Al.sub.y As region (1.gtoreq.y>0) is first formed, a Ga.sub.1.sub.-z In.sub.z As is grown thereon as an active region and a p-type Ga.sub.1.sub.-y Al.sub.y As region is then formed on the active region and the value of z is so selected as to make the lattice constants of the active region smaller than those of the first and third regions.
    Type: Grant
    Filed: March 30, 1976
    Date of Patent: July 5, 1977
    Assignee: Matsushita Electronics Corporation
    Inventors: Kunio Itoh, Morio Inoue
  • Patent number: 4016505
    Abstract: A double-heterostructure injection laser can be improved to have a low threshold current. The improvement is obtained when the active region of GaAs or Ga.sub.l-y Al.sub.y As consists of several component layers wherein the central layer has the highest carrier concentrations and the layers on both sides of the central layer have lower carrier concentrations and the farther the outer layers are apart from the central layer, the lower are their carrier concentrations.By forming the active region in this manner, the light generated in the active region is well confined in the region without undesirable leaking, resulting in a considerable lowering of the threshold current.
    Type: Grant
    Filed: August 28, 1975
    Date of Patent: April 5, 1977
    Assignee: Matsushita Electronics Corporation
    Inventors: Kunio Itoh, Morio Inoue