Patents by Inventor Morio Takeishi

Morio Takeishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5768494
    Abstract: In order to effectively avoid faulty or false read error corrections in a digital data processing system, a check is made to see if the number of data read retrials reaches a preset number whose value is less than the maximum number of data read retrials. This checking limits the number of routine runs which can pass through an execution step wherein a check for an uncorrectable error is conducted, to a value which is markedly lower than that of the prior art. Further, if the routine passes once through a flag setting step wherein a flag is set to a preset logic level in the event that an error correcting length exceeds a length of data retrieved from a memory, all checking for uncorrectable errors is by-passed. Hence, the possibility that an uncorrectable error will be erroneously detected an a correctable one is greatly reduced or eliminated.
    Type: Grant
    Filed: September 24, 1996
    Date of Patent: June 16, 1998
    Assignee: NEC Corporation
    Inventor: Morio Takeishi