Abstract: An information communication system for performing information communication between a first system and a second system is disclosed. The communication system includes a first communication path that is used for information communication when a transfer size between the first system and the second system is smaller than a predetermined size and is capable of high-speed response, and a second communication path that is used for information communication when the transfer size between the first system and the second system is larger than the predetermined size and has a larger transfer capability than that of the first communication path. Each of the first and second systems comprises main control means for selectively using one of the first and second communication paths in accordance with a size of information subjected to information communication with a counterpart system.

Abstract: When a data update request is sent from a host computer, a main controller determines one of a plurality of disk cache units, which is used, in accordance with a striping group to which a stripe corresponding to the requested update data belongs. The main controller loads the block data, required for generating updated parity data for the stripe in units of blocks, in a parity generator in the corresponding disk cache unit via a cache memory in the determined disk cache unit. The corresponding parity generator generates corresponding parity data.

Abstract: A higher reliable storage array system. A plurality of data storage devices store data; a spare storage device replaces one of the plurality of data storage devices; and a control unit controls an I/O operation of the plurality of data storage devices and the spare storage device. The control unit includes means for storing a history of self recovered errors of each one of the plurality of data storage devices, means for calculating an error rate of each of the plurality of data storage devices on the basis of the history of errors, means for judging a necessity to execute a preventive maintenance of each one of the plurality of data storage devices from the error rate, and means for executing the preventive maintenance.

Abstract: According to this invention, a dual-memory managing apparatus is applied to a system in which a plurality of memories and a plurality of processors are connected to each other through a data bus, and the dual-memory managing apparatus is a dual-memory managing apparatus for performing control performed when a memory copy operation from at least one first memory to at least one second memory system.

Abstract: An electronic equipment such as a CPU body of a computer system includes a circuit board section, an abnormal temperature detecting section, a determining section, a refrigerant cooling system, and an alarm unit. The circuit board section for effecting preset signal processings includes a printed circuit board on which at least one PTC (Positive Temperature Coefficient) thermistor built-in type integrated circuit device including a package, an integrated circuit chip disposed in the package, a PTC thermistor disposed between the package and the integrated circuit chip, and an electrical deriving member disposed in the package, for transferring a signal with respect to the integrated circuit chip and PTC thermistor, and electronic elements are mounted. The abnormal temperature detecting section outputs an abnormal temperature signal when an output of the PTC thermistor has exceeded a preset value.

Abstract: A printed circuit board assembly is stored in a frame. The printed circuit board assembly comprises at least a mother board and printed circuit boards. The mother board is provided with board-insertion connectors and a fan separately. The printed circuit boards are laminated and disposed on the mother board. First and second feed/exhaust units are arranged through the printed circuit board assembly. The first feed/exhaust unit feeds air between the laminated printed circuit boards in a first direction perpendicular to the direction of lamination of the laminated printed circuit boards. The second feed/exhaust unit feeds air outside the endmost printed circuit board of the laminated printed circuit boards in a second direction perpendicular to the direction of lamination of the laminated printed circuit boards, the second direction extending through the fan.

Abstract: A request buffer apparatus controls a plurality of access requests to devices to be accessed (e.g., memory banks) commonly used by a plurality of accessing devices (e.g., a CPU, channels, and DMA units) in a data processing system. The apparatus has a request buffer means which has a plurality of buffers for storing the access requests. Write/read operations of the requests in and from the request buffer means are randomly performed in accordance with the status of the device to be accessed corresponding to the request stored in the buffer. Requests corresponding to the same device to be accessed are written in the empty buffers of the request buffer means in the order they are generated, and are read out from the request buffer means in the order that they are written. Each device to be accessed has a buffer write address generating means, and the buffer write status of each buffer is indicated so as to obtain the next buffer write address.