Patents by Inventor Morishiro Sudo

Morishiro Sudo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6518766
    Abstract: A disconnection-inspecting method for inspecting an electrical disconnection between circuits formed on both surfaces of a board is provided. The method includes the steps of: placing the board on an insulating sheet laid on a reference conductor; measuring a first capacitance between the reference conductor and one of the circuits formed on a surface of both surfaces opposite to the other surface facing the insulating sheet; measuring a second capacitance between the reference conductor and the one of the circuits by changing a first physical quantity of the insulating sheet; calculating a second physical quantity of each of the circuits based on the first capacitance and the second capacitance measured in the steps of measuring; and judging the presence of the electrical disconnection based on the second physical quantity calculated in the step of calculating.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: February 11, 2003
    Assignee: Fujitsu Automation Limited
    Inventor: Morishiro Sudo
  • Publication number: 20020075008
    Abstract: A disconnection-inspecting method for inspecting an electrical disconnection between circuits formed on both surfaces of a board is provided. The method comprises the steps of: placing the board on an insulating sheet laid on a reference conductor; measuring a first capacitance between the reference conductor and one of the circuits formed on a surface of both surfaces opposite to the other surface facing the insulating sheet; measuring a second capacitance between the reference conductor and the one of the circuits by changing a first physical quantity of the insulating sheet; calculating a second physical quantity of each of the circuits based on the first capacitance and the second capacitance measured in the steps of measuring; and judging the presence of the electrical disconnection based on the second physical quantity calculated in the step of calculating.
    Type: Application
    Filed: June 25, 2001
    Publication date: June 20, 2002
    Inventor: Morishiro Sudo
  • Patent number: 5744964
    Abstract: For a print-circuit board 10 of a good product, probes 31 and 32 are made to be electrically continuous with a ground plate 13 and a wiring pattern i respectively to measure a capacitance Cgi, which is then stored in a storage device 44. A capacitance Ci of a print-circuit board 10, the object of testing, is measured in a similar manner and a ratio .mu.=(average value Ca of a several measured capacitance value of the object of testing/(average value Cga of the corresponding measured capacitance values of the good product) is calculated. If Ci<Cgj(1-.DELTA.e0) or Ci>Cgj(1+.DELTA.e0), the measured capacitance values Ci and Cgjare excluded from the objects of calculation of the average values. If Cj<.mu..Cgj(1-.DELTA.e) or Cj>.mu..Cgj(1+.DELTA.e), a wiring j is judged to be defective and the resistance measuring method is employed to judge the details of the defect. The tolerance rate .DELTA.e0 and .DELTA.e are 0.15 and 0.02 respectively.
    Type: Grant
    Filed: July 25, 1996
    Date of Patent: April 28, 1998
    Assignee: Fujitsu Automation Limited
    Inventors: Morishiro Sudo, Masaru Ishijima, Kazuo Yamazaki