Patents by Inventor Moritaka Nakamura

Moritaka Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8779279
    Abstract: The present invention provides an integrated wiring member (46, 47, 48) for a solar cell module, including a first wiring member, a second wiring member, and an insulating and protecting film for insulating the first wiring member and the second wiring member from each other. Herein, the first wiring member and the second wiring member are integrated with each other through the insulating and protecting film.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: July 15, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Moritaka Nakamura
  • Patent number: 8572906
    Abstract: A solar cell module 1a is constituted from a main frame member 10a and a sub-frame member 20a that hold a solar cell panel 9. The main frame member 10a is constituted from a main outer wall 11, a main holding upper piece 12, a main holding lower piece 13, and a main bottom piece 16 and, also, the sub-frame member 20a is constituted from a sub-outer wall 21, a sub-holding upper piece 22, a sub-holding lower piece 23, a sub-base piece 24, a sub-inner wall 25, and a sub-bottom piece 26. Then, the main bottom piece 16 and the sub-bottom piece 26 are formed so as not to collide with each other, such that the projecting position heights of the pieces are different.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: November 5, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Moritaka Nakamura
  • Patent number: 8404966
    Abstract: A solar cell module (1a) is constituted such that a solar cell panel (9) is held using a main frame member (10) that holds one side of the solar cell panel (9) and a sub-frame member (20) that holds an adjoining side that adjoins this one side, the main frame member (10) is constituted from a solar cell panel main holding portion (11), a main wall portion (12), and a main bottom piece (16), the sub-frame member (20) is constituted from a solar cell panel sub-holding portion (21), a sub-wall portion (22), and a sub-bottom piece (26), the sub-bottom piece (26) of the sub-frame member (20) is positioned above the main bottom piece (16) of the main frame member (10), the lower surface near the side end of this sub-bottom piece (26) abuts against the upper surface near the side end of the main bottom piece (16), and a water barrier piece (28) bent upward is formed at the inner side edge of this sub-bottom piece (26).
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: March 26, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Moritaka Nakamura
  • Publication number: 20120048335
    Abstract: A wiring sheet in accordance with the present invention is a wiring sheet having wirings provided on an insulating base material for electrically connecting back surface electrode type solar cells each having first conductivity type electrodes and second conductivity type electrodes arranged on one surface of a semiconductor substrate, wherein a cell arrangement portion located at least one of both ends of cell arrangement portions aligned in a second direction on the insulating base material and a cell arrangement portion adjacent to that cell arrangement portion in a first direction are arranged such that a first conductivity type wiring in one cell arrangement portion and a second conductivity type wiring in the other cell arrangement portion are adjacent to each other in the first direction, and one of combinations of the wirings having different conductivity types is electrically connected between said one cell arrangement portion and said other cell arrangement portion.
    Type: Application
    Filed: April 14, 2010
    Publication date: March 1, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Moritaka Nakamura
  • Publication number: 20110120529
    Abstract: A solar cell module (1a) is constituted such that a solar cell panel (9) is held using a main frame member (10) that holds one side of the solar cell panel (9) and a sub-frame member (20) that holds an adjoining side that adjoins this one side, the main frame member (10) is constituted from a solar cell panel main holding portion (11), a main wall portion (12), and a main bottom piece (16), the sub-frame member (20) is constituted from a solar cell panel sub-holding portion (21), a sub-wall portion (22), and a sub-bottom piece (26), the sub-bottom piece (26) of the sub-frame member (20) is positioned above the main bottom piece (16) of the main frame member (10), the lower surface near the side end of this sub-bottom piece (26) abuts against the upper surface near the side end of the main bottom piece (16), and a water barrier piece (28) bent upward is formed at the inner side edge of this sub-bottom piece (26).
    Type: Application
    Filed: August 27, 2008
    Publication date: May 26, 2011
    Inventor: Moritaka Nakamura
  • Publication number: 20110011440
    Abstract: There are provided a solar cell including a semiconductor substrate and a busbar electrode extending in a first direction and a finger electrode extending in a second direction on a first surface of the semiconductor substrate the finger electrode and the busbar electrode being electrically connected to each other, and a side portion of the busbar electrode being curved such that a width of the busbar electrode increases toward an end portion of the busbar electrode in a region near the end portion of the busbar electrode in the first direction a solar cell string, and a solar cell module.
    Type: Application
    Filed: March 25, 2009
    Publication date: January 20, 2011
    Inventors: Masaomi Hioki, Moritaka Nakamura, Yoshinobu Umetani, Masahiro Ohbasami, Mikiyasu Ishii, Satoshi Tanaka, Shuzo Ishii
  • Publication number: 20100243035
    Abstract: A solar cell module 1a is constituted from a main frame member 10a and a sub-frame member 20a that hold a solar cell panel 9. The main frame member 10a is constituted from a main outer wall 11, a main holding upper piece 12, a main holding lower piece 13, and a main bottom piece 16 and, also, the sub-frame member 20a is constituted from a sub-outer wall 21, a sub-holding upper piece 22, a sub-holding lower piece 23, a sub-base piece 24, a sub-inner wall 25, and a sub-bottom piece 26. Then, the main bottom piece 16 and the sub-bottom piece 26 are formed so as not to collide with each other, such that the projecting position heights of the pieces are different.
    Type: Application
    Filed: September 2, 2008
    Publication date: September 30, 2010
    Inventor: Moritaka Nakamura
  • Publication number: 20080053511
    Abstract: The present invention provides an integrated wiring member (46, 47, 48) for a solar cell module, including a first wiring member, a second wiring member, and an insulating and protecting film for insulating the first wiring member and the second wiring member from each other. Herein, the first wiring member and the second wiring member are integrated with each other through the insulating and protecting film.
    Type: Application
    Filed: April 22, 2005
    Publication date: March 6, 2008
    Inventor: Moritaka Nakamura
  • Patent number: 6901762
    Abstract: An apparatus for controlling the pressure in a cargo tank 1 supplies BOG generated from liquefied natural gas stored in the cargo tank 1 to a burning system 6 through a compressor. In this apparatus, a reliquefaction plant 5 is disposed on the downstream side of first and second compressors 3 and 4 and on the upstream side of the cargo tank 1 so that BOG discharged from the second compressor 4 is liquefied by the reliquefaction plant 5 and the liquefied fluid is returned again into the cargo tank 1.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: June 7, 2005
    Assignees: Osaka Gas Co., Ltd., Nippon Yusen Kabushiki Kaisha, Mitsubishi Heavy Industries, Ltd., Chiyoda Corporation
    Inventors: Toshikazu Irie, Norio Hatanaka, Takashi Mihashi, Eiji Tominaga, Kazuhiko Ohtake, Masaru Oka, Moritaka Nakamura, Motohiro Omori
  • Patent number: 6790766
    Abstract: A method of fabricating a semiconductor device capable of increasing the selectivity of a low dielectric constant insulator film to an etching mask layer such as an etching stopper film without increasing the thickness of the etching mask layer is obtained. This method of fabricating a semiconductor device comprises steps of forming a first insulator film including a polymer film containing C and H, forming a first etching mask layer containing Si on a prescribed region of the first insulator film and plasma-etching the first insulator film with etching gas containing nitrogen and monochromated ion energy having a narrow energy width through a mask of the first etching mask layer.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: September 14, 2004
    Assignees: Sanyo Electric Co., Ltd., Fujitsu Limited
    Inventors: Yoshikazu Yamaoka, Moritaka Nakamura
  • Patent number: 6747641
    Abstract: In a liquid crystal display device that achieves display by using an active-matrix liquid crystal panel, for a predetermined time after the driving of the liquid crystal panel is stopped, a voltage is kept applied only to the opposing electrode through which all the liquid crystal layers constituting the liquid crystal panel are driven. This helps shorten the time required for the electric charge accumulated in the liquid crystal panel to be discharged and thereby prevent degradation of display quality and deterioration of the liquid crystal panel through simple control.
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: June 8, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Moritaka Nakamura, Manabu Tanaka, Yugo Kasai
  • Publication number: 20040068993
    Abstract: A pressure control device of a cargo tank (1) for supplying the BOG of the stored liquefied natural gas producing inside the cargo tank to a incineration treating system (6) through compressors so as to control a pressure in the cargo tank (1), wherein a re-liquefying device (5) is disposed on the downstream side of the first and second compressors (3, 4), i.e.
    Type: Application
    Filed: April 10, 2003
    Publication date: April 15, 2004
    Inventors: Toshikazu Irie, Norio Hatanaka, Takashi Mihashi, Eiji Tominaga, Kazuhiko Ohtake, Masaru Oka, Moritaka Nakamura, Motohiro Omori
  • Publication number: 20030181067
    Abstract: A method of fabricating a semiconductor device capable of increasing the selectivity of a low dielectric constant insulator film to an etching mask layer such as an etching stopper film without increasing the thickness of the etching mask layer is obtained.
    Type: Application
    Filed: March 19, 2003
    Publication date: September 25, 2003
    Applicants: SANYO ELECTRIC CO., LTD., FUJITSU LIMITED
    Inventors: Yoshikazu Yamaoka, Moritaka Nakamura
  • Patent number: 6486073
    Abstract: An interconnection pattern made of an aluminum alloy, such as Al—Cu, on a semiconductor IC, is dry etched in an etching gas containing a chlorine component. A photo resist stripping process is carried out at a location down stream of the etching process using a conventional stripping gas, such as CF4+02, at room temperature. Before the resist-stripped substrate is exposed to open air, the substrate is heated in a vacuum to a temperature above 100° C., to remove residual chlorine components.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: November 26, 2002
    Assignee: Fujitsu Limited
    Inventor: Moritaka Nakamura
  • Publication number: 20020147904
    Abstract: A center site on net is prepared to record every data requested by client to be recorded by electronic database system and, when the center site recorded these data, the center site issues any receipt to the client.
    Type: Application
    Filed: April 10, 2001
    Publication date: October 10, 2002
    Inventor: Moritaka Nakamura
  • Publication number: 20020063667
    Abstract: In a liquid crystal display device that achieves display by using an active-matrix liquid crystal panel, for a predetermined time after the driving of the liquid crystal panel is stopped, a voltage is kept applied only to the opposing electrode through which all the liquid crystal layers constituting the liquid crystal panel are driven. This helps shorten the time required for the electric charge accumulated in the liquid crystal panel to be discharged and thereby prevent degradation of display quality and deterioration of the liquid crystal panel through simple control.
    Type: Application
    Filed: August 1, 2001
    Publication date: May 30, 2002
    Inventors: Moritaka Nakamura, Manabu Tanaka, Yugo Kasai
  • Patent number: 6184148
    Abstract: An interconnection pattern made of aluminum alloy, such as Al-Cu, on a semiconductor IC, is dry etched in an etching gas containing a chlorine component. Residual chlorine components on the substrate are difficult to remove, thus causing corrosion problems with respect to the patterned aluminum alloy layer. Accordingly, to prevent such corrosion, a photo resist stripping process is carried out at a location down stream of the etching process using a conventional stripping gas, such as CF4+O2, at room temperature. Next, and before the resist-stripped substrate is exposed to open air, the substrate is heated in a vacuum to a temperature above 100° C., to thus remove residual chlorine components. In an alternative method, the heating process is carried out concurrently with the resist stripping process.
    Type: Grant
    Filed: April 18, 1997
    Date of Patent: February 6, 2001
    Assignee: Fujitsu Limited
    Inventor: Moritaka Nakamura
  • Patent number: 6062041
    Abstract: Provided is a method for liquefying natural gas which can be applied to LNG plants of a wide range of capacity and can produce LNG both efficiently and economically. Feed gas of natural gas or a non-liquefied component of recycle gas which is produced during a process of liquefying natural gas is liquefied by using a first refrigerant, for instant consisting of a C3 refrigerant, and a second refrigerant which is different from the first refrigerant, for instance consisting of a C2 refrigerant, in a stepwise fashion. The flow is then liquefied by a substantially isentropic expansion process. The non-liquefied component remaining from this expansion process is then pressurized by a compressor, and combined with the non-liquefied component of the natural gas for recycling the combined flow. The compressor is driven by power obtained from the substantially isentropic expansion process.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: May 16, 2000
    Assignee: Chiyoda Corporation
    Inventors: Yoshitsugi Kikkawa, Osamu Yamamoto, Moritaka Nakamura, Shigeru Sugiyama, Yasuharu Fukuda
  • Patent number: 6020938
    Abstract: A matrix-type display device is a liquid crystal device having 240 vertical lines on a display screen, and is provided with a driving circuit which writes a signal simultaneously into two vertical lines in one in every three scanning lines of an EDTV2 signal, in which a number of scanning lines is 180 per field, when an image based on the EDTV2 signal is displayed on the display screen. As a result, a circuit having a complicated configuration is not required, and an image based on the EDTV2 signal can be displayed on the whole display screen of a liquid crystal module having 240 vertical lines without a non-image portion.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: February 1, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Moritaka Nakamura, Kouji Kumada, Yukihiro Nakahara
  • Patent number: 5929925
    Abstract: A matrix type display device capable of receiving more than one video signal, which displays an image based on a first video signal with a smaller aspect ratio than an aspect ratio of a screen in width by inputting a second video signal in sync with a first video signal to at least a part of column drivers corresponding to a remaining portion on the screen where the image based on the first video signal is not displayed, so that the processing of the first and second video signals is started at the same time and carried out at the same timing. Consequently, the present matrix type display device can readily display a natural image based on an input video signal with a smaller aspect ratio than the that of the screen.
    Type: Grant
    Filed: January 6, 1997
    Date of Patent: July 27, 1999
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Moritaka Nakamura, Kouji Kumada, Yukihiro Nakahara