Patents by Inventor Moritoshi Shirato

Moritoshi Shirato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4551841
    Abstract: A one-chip semiconductor device, such as a one-chip microcomputer, includes a power-supply-potential detecting circuit (9) which, when the power supply potential (V.sub.CC) becomes lower than a predetermined value (V.sub.D), generates a reset signal (RST) to reset, i.e., initialize the one-chip device. A reset signal inhibiting circuit (10, 11) is provided to inhibit the transmission of the reset signal during the check mode.
    Type: Grant
    Filed: June 9, 1983
    Date of Patent: November 5, 1985
    Assignee: Fujitsu Limited
    Inventors: Kouichi Fujita, Moritoshi Shirato